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@@ -29,11 +29,13 @@
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#include <linux/cpufreq.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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-#include <linux/pci.h>
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#include <asm/msr.h>
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#include <asm/timex.h>
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#include <asm/io.h>
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+#include <asm/acpi.h>
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+#include <linux/acpi.h>
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+#include <acpi/processor.h>
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#include "longhaul.h"
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@@ -56,6 +58,8 @@ static int minvid, maxvid;
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static unsigned int minmult, maxmult;
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static int can_scale_voltage;
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static int vrmrev;
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+static struct acpi_processor *pr = NULL;
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+static struct acpi_processor_cx *cx = NULL;
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/* Module parameters */
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static int dont_scale_voltage;
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@@ -118,84 +122,64 @@ static int longhaul_get_cpu_mult(void)
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return eblcr_table[invalue];
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}
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+/* For processor with BCR2 MSR */
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-static void do_powersaver(union msr_longhaul *longhaul,
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- unsigned int clock_ratio_index)
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+static void do_longhaul1(int cx_address, unsigned int clock_ratio_index)
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{
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- struct pci_dev *dev;
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- unsigned long flags;
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- unsigned int tmp_mask;
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- int version;
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- int i;
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- u16 pci_cmd;
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- u16 cmd_state[64];
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+ union msr_bcr2 bcr2;
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+ u32 t;
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- switch (cpu_model) {
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- case CPU_EZRA_T:
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- version = 3;
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- break;
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- case CPU_NEHEMIAH:
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- version = 0xf;
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- break;
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- default:
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- return;
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- }
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+ rdmsrl(MSR_VIA_BCR2, bcr2.val);
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+ /* Enable software clock multiplier */
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+ bcr2.bits.ESOFTBF = 1;
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+ bcr2.bits.CLOCKMUL = clock_ratio_index;
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- rdmsrl(MSR_VIA_LONGHAUL, longhaul->val);
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- longhaul->bits.SoftBusRatio = clock_ratio_index & 0xf;
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- longhaul->bits.SoftBusRatio4 = (clock_ratio_index & 0x10) >> 4;
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- longhaul->bits.EnableSoftBusRatio = 1;
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- longhaul->bits.RevisionKey = 0;
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+ /* Sync to timer tick */
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+ safe_halt();
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+ ACPI_FLUSH_CPU_CACHE();
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+ /* Change frequency on next halt or sleep */
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+ wrmsrl(MSR_VIA_BCR2, bcr2.val);
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+ /* Invoke C3 */
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+ inb(cx_address);
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+ /* Dummy op - must do something useless after P_LVL3 read */
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+ t = inl(acpi_fadt.xpm_tmr_blk.address);
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+
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+ /* Disable software clock multiplier */
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+ local_irq_disable();
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+ rdmsrl(MSR_VIA_BCR2, bcr2.val);
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+ bcr2.bits.ESOFTBF = 0;
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+ wrmsrl(MSR_VIA_BCR2, bcr2.val);
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+}
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- preempt_disable();
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- local_irq_save(flags);
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+/* For processor with Longhaul MSR */
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- /*
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- * get current pci bus master state for all devices
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- * and clear bus master bit
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- */
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- dev = NULL;
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- i = 0;
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- do {
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- dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
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- if (dev != NULL) {
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- pci_read_config_word(dev, PCI_COMMAND, &pci_cmd);
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- cmd_state[i++] = pci_cmd;
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- pci_cmd &= ~PCI_COMMAND_MASTER;
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- pci_write_config_word(dev, PCI_COMMAND, pci_cmd);
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- }
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- } while (dev != NULL);
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+static void do_powersaver(int cx_address, unsigned int clock_ratio_index)
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+{
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+ union msr_longhaul longhaul;
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+ u32 t;
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- tmp_mask=inb(0x21); /* works on C3. save mask. */
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- outb(0xFE,0x21); /* TMR0 only */
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- outb(0xFF,0x80); /* delay */
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+ rdmsrl(MSR_VIA_LONGHAUL, longhaul.val);
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+ longhaul.bits.RevisionKey = longhaul.bits.RevisionID;
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+ longhaul.bits.SoftBusRatio = clock_ratio_index & 0xf;
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+ longhaul.bits.SoftBusRatio4 = (clock_ratio_index & 0x10) >> 4;
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+ /* Sync to timer tick */
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safe_halt();
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- wrmsrl(MSR_VIA_LONGHAUL, longhaul->val);
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- halt();
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-
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+ ACPI_FLUSH_CPU_CACHE();
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+ /* Change frequency on next halt or sleep */
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+ wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);
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+ /* Invoke C3 */
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+ inb(cx_address);
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+ /* Dummy op - must do something useless after P_LVL3 read */
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+ t = inl(acpi_fadt.xpm_tmr_blk.address);
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+
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+ /* Disable bus ratio bit */
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local_irq_disable();
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-
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- outb(tmp_mask,0x21); /* restore mask */
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-
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- /* restore pci bus master state for all devices */
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- dev = NULL;
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- i = 0;
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- do {
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- dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
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- if (dev != NULL) {
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- pci_cmd = cmd_state[i++];
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- pci_write_config_byte(dev, PCI_COMMAND, pci_cmd);
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- }
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- } while (dev != NULL);
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- local_irq_restore(flags);
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- preempt_enable();
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-
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- /* disable bus ratio bit */
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- rdmsrl(MSR_VIA_LONGHAUL, longhaul->val);
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- longhaul->bits.EnableSoftBusRatio = 0;
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- longhaul->bits.RevisionKey = version;
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- wrmsrl(MSR_VIA_LONGHAUL, longhaul->val);
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+ longhaul.bits.RevisionKey = longhaul.bits.RevisionID;
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+ longhaul.bits.EnableSoftBusRatio = 0;
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+ longhaul.bits.EnableSoftBSEL = 0;
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+ longhaul.bits.EnableSoftVID = 0;
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+ wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);
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}
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/**
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@@ -209,9 +193,9 @@ static void longhaul_setstate(unsigned int clock_ratio_index)
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{
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int speed, mult;
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struct cpufreq_freqs freqs;
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- union msr_longhaul longhaul;
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- union msr_bcr2 bcr2;
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static unsigned int old_ratio=-1;
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+ unsigned long flags;
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+ unsigned int pic1_mask, pic2_mask;
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if (old_ratio == clock_ratio_index)
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return;
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@@ -234,6 +218,20 @@ static void longhaul_setstate(unsigned int clock_ratio_index)
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dprintk ("Setting to FSB:%dMHz Mult:%d.%dx (%s)\n",
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fsb, mult/10, mult%10, print_speed(speed/1000));
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+ preempt_disable();
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+ local_irq_save(flags);
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+
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+ pic2_mask = inb(0xA1);
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+ pic1_mask = inb(0x21); /* works on C3. save mask. */
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+ outb(0xFF,0xA1); /* Overkill */
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+ outb(0xFE,0x21); /* TMR0 only */
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+
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+ /* Disable bus master arbitration */
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+ if (pr->flags.bm_check) {
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+ acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1,
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+ ACPI_MTX_DO_NOT_LOCK);
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+ }
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+
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switch (longhaul_version) {
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/*
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@@ -245,20 +243,7 @@ static void longhaul_setstate(unsigned int clock_ratio_index)
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*/
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case TYPE_LONGHAUL_V1:
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case TYPE_LONGHAUL_V2:
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- rdmsrl (MSR_VIA_BCR2, bcr2.val);
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- /* Enable software clock multiplier */
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- bcr2.bits.ESOFTBF = 1;
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- bcr2.bits.CLOCKMUL = clock_ratio_index;
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- local_irq_disable();
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- wrmsrl (MSR_VIA_BCR2, bcr2.val);
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- safe_halt();
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-
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- /* Disable software clock multiplier */
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- rdmsrl (MSR_VIA_BCR2, bcr2.val);
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- bcr2.bits.ESOFTBF = 0;
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- local_irq_disable();
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- wrmsrl (MSR_VIA_BCR2, bcr2.val);
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- local_irq_enable();
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+ do_longhaul1(cx->address, clock_ratio_index);
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break;
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/*
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@@ -273,10 +258,22 @@ static void longhaul_setstate(unsigned int clock_ratio_index)
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* to work in practice.
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*/
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case TYPE_POWERSAVER:
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- do_powersaver(&longhaul, clock_ratio_index);
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+ do_powersaver(cx->address, clock_ratio_index);
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break;
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}
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+ /* Enable bus master arbitration */
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+ if (pr->flags.bm_check) {
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+ acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0,
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+ ACPI_MTX_DO_NOT_LOCK);
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+ }
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+
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+ outb(pic2_mask,0xA1); /* restore mask */
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+ outb(pic1_mask,0x21);
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+
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+ local_irq_restore(flags);
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+ preempt_enable();
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+
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cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
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}
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@@ -527,6 +524,18 @@ static unsigned int longhaul_get(unsigned int cpu)
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return calc_speed(longhaul_get_cpu_mult());
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}
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+acpi_status longhaul_walk_callback(acpi_handle obj_handle,
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+ u32 nesting_level,
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+ void *context, void **return_value)
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+{
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+ struct acpi_device *d;
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+
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+ if ( acpi_bus_get_device(obj_handle, &d) ) {
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+ return 0;
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+ }
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+ *return_value = (void *)acpi_driver_data(d);
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+ return 1;
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+}
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static int __init longhaul_cpu_init(struct cpufreq_policy *policy)
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{
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@@ -534,6 +543,15 @@ static int __init longhaul_cpu_init(struct cpufreq_policy *policy)
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char *cpuname=NULL;
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int ret;
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+ /* Check ACPI support for C3 state */
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+ acpi_walk_namespace(ACPI_TYPE_PROCESSOR, ACPI_ROOT_OBJECT, ACPI_UINT32_MAX,
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+ &longhaul_walk_callback, NULL, (void *)&pr);
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+ if (pr == NULL) goto err_acpi;
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+
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+ cx = &pr->power.states[ACPI_STATE_C3];
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+ if (cx == NULL || cx->latency > 1000) goto err_acpi;
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+
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+ /* Now check what we have on this motherboard */
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switch (c->x86_model) {
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case 6:
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cpu_model = CPU_SAMUEL;
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@@ -634,6 +652,10 @@ static int __init longhaul_cpu_init(struct cpufreq_policy *policy)
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cpufreq_frequency_table_get_attr(longhaul_table, policy->cpu);
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return 0;
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+
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+err_acpi:
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+ printk(KERN_ERR PFX "No ACPI support for CPU frequency changes.\n");
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+ return -ENODEV;
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}
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static int __devexit longhaul_cpu_exit(struct cpufreq_policy *policy)
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