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@@ -526,6 +526,11 @@ static int mdio_read(void __iomem *ioaddr, int reg_addr)
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return value;
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}
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+static void mdio_patch(void __iomem *ioaddr, int reg_addr, int value)
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+{
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+ mdio_write(ioaddr, reg_addr, mdio_read(ioaddr, reg_addr) | value);
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+}
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+
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static void rtl_mdio_write(struct net_device *dev, int phy_id, int location,
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int val)
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{
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@@ -543,6 +548,72 @@ static int rtl_mdio_read(struct net_device *dev, int phy_id, int location)
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return mdio_read(ioaddr, location);
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}
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+static void rtl_ephy_write(void __iomem *ioaddr, int reg_addr, int value)
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+{
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+ unsigned int i;
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+
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+ RTL_W32(EPHYAR, EPHYAR_WRITE_CMD | (value & EPHYAR_DATA_MASK) |
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+ (reg_addr & EPHYAR_REG_MASK) << EPHYAR_REG_SHIFT);
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+
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+ for (i = 0; i < 100; i++) {
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+ if (!(RTL_R32(EPHYAR) & EPHYAR_FLAG))
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+ break;
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+ udelay(10);
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+ }
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+}
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+
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+static u16 rtl_ephy_read(void __iomem *ioaddr, int reg_addr)
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+{
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+ u16 value = 0xffff;
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+ unsigned int i;
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+
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+ RTL_W32(EPHYAR, (reg_addr & EPHYAR_REG_MASK) << EPHYAR_REG_SHIFT);
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+
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+ for (i = 0; i < 100; i++) {
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+ if (RTL_R32(EPHYAR) & EPHYAR_FLAG) {
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+ value = RTL_R32(EPHYAR) & EPHYAR_DATA_MASK;
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+ break;
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+ }
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+ udelay(10);
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+ }
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+
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+ return value;
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+}
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+
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+static void rtl_csi_write(void __iomem *ioaddr, int addr, int value)
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+{
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+ unsigned int i;
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+
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+ RTL_W32(CSIDR, value);
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+ RTL_W32(CSIAR, CSIAR_WRITE_CMD | (addr & CSIAR_ADDR_MASK) |
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+ CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT);
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+
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+ for (i = 0; i < 100; i++) {
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+ if (!(RTL_R32(CSIAR) & CSIAR_FLAG))
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+ break;
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+ udelay(10);
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+ }
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+}
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+
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+static u32 rtl_csi_read(void __iomem *ioaddr, int addr)
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+{
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+ u32 value = ~0x00;
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+ unsigned int i;
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+
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+ RTL_W32(CSIAR, (addr & CSIAR_ADDR_MASK) |
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+ CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT);
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+
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+ for (i = 0; i < 100; i++) {
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+ if (RTL_R32(CSIAR) & CSIAR_FLAG) {
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+ value = RTL_R32(CSIDR);
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+ break;
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+ }
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+ udelay(10);
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+ }
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+
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+ return value;
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+}
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+
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static void rtl8169_irq_mask_and_ack(void __iomem *ioaddr)
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{
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RTL_W16(IntrMask, 0x0000);
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@@ -2114,6 +2185,31 @@ static void rtl_tx_performance_tweak(struct pci_dev *pdev, u16 force)
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}
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}
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+static void rtl_csi_access_enable(void __iomem *ioaddr)
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+{
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+ u32 csi;
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+
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+ csi = rtl_csi_read(ioaddr, 0x070c) & 0x00ffffff;
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+ rtl_csi_write(ioaddr, 0x070c, csi | 0x27000000);
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+}
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+
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+struct ephy_info {
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+ unsigned int offset;
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+ u16 mask;
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+ u16 bits;
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+};
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+
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+static void rtl_ephy_init(void __iomem *ioaddr, struct ephy_info *e, int len)
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+{
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+ u16 w;
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+
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+ while (len-- > 0) {
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+ w = (rtl_ephy_read(ioaddr, e->offset) & ~e->mask) | e->bits;
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+ rtl_ephy_write(ioaddr, e->offset, w);
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+ e++;
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+ }
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+}
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+
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static void rtl_hw_start_8168(struct net_device *dev)
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{
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struct rtl8169_private *tp = netdev_priv(dev);
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