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@@ -123,7 +123,7 @@ static int external_map[] = { 2 };
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static int chip0_map[] = { 0 };
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static int chip1_map[] = { 1 };
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-struct mtd_partition osiris_default_nand_part[] = {
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+static struct mtd_partition osiris_default_nand_part[] = {
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[0] = {
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.name = "Boot Agent",
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.size = SZ_16K,
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@@ -249,8 +249,10 @@ static struct s3c24xx_board osiris_board __initdata = {
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.clocks_count = ARRAY_SIZE(osiris_clocks)
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};
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-void __init osiris_map_io(void)
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+static void __init osiris_map_io(void)
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{
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+ unsigned long flags;
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+
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/* initialise the clocks */
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s3c24xx_dclk0.parent = NULL;
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@@ -272,7 +274,10 @@ void __init osiris_map_io(void)
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s3c24xx_set_board(&osiris_board);
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/* fix bus configuration (nBE settings wrong on ABLE pre v2.20) */
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+
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+ local_irq_save(flags);
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__raw_writel(__raw_readl(S3C2410_BWSCON) | S3C2410_BWSCON_ST1 | S3C2410_BWSCON_ST2 | S3C2410_BWSCON_ST3 | S3C2410_BWSCON_ST4 | S3C2410_BWSCON_ST5, S3C2410_BWSCON);
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+ local_irq_restore(flags);
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/* write-protect line to the NAND */
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s3c2410_gpio_setpin(S3C2410_GPA0, 1);
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@@ -280,7 +285,6 @@ void __init osiris_map_io(void)
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MACHINE_START(OSIRIS, "Simtec-OSIRIS")
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/* Maintainer: Ben Dooks <ben@simtec.co.uk> */
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- .phys_ram = S3C2410_SDRAM_PA,
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.phys_io = S3C2410_PA_UART,
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.io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
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.boot_params = S3C2410_SDRAM_PA + 0x100,
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