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@@ -0,0 +1,500 @@
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+/*
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+ * SuperH Mobile I2C Controller
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+ *
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+ * Copyright (C) 2008 Magnus Damm
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+ *
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+ * Portions of the code based on out-of-tree driver i2c-sh7343.c
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+ * Copyright (c) 2006 Carlos Munoz <carlos@kenati.com>
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/module.h>
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+#include <linux/init.h>
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+#include <linux/delay.h>
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+#include <linux/platform_device.h>
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+#include <linux/interrupt.h>
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+#include <linux/i2c.h>
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+#include <linux/err.h>
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+#include <linux/clk.h>
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+#include <linux/io.h>
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+
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+enum sh_mobile_i2c_op {
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+ OP_START = 0,
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+ OP_TX_ONLY,
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+ OP_TX_STOP,
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+ OP_TX_TO_RX,
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+ OP_RX_ONLY,
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+ OP_RX_STOP,
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+};
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+
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+struct sh_mobile_i2c_data {
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+ struct device *dev;
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+ void __iomem *reg;
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+ struct i2c_adapter adap;
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+
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+ struct clk *clk;
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+ u_int8_t iccl;
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+ u_int8_t icch;
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+
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+ spinlock_t lock;
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+ wait_queue_head_t wait;
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+ struct i2c_msg *msg;
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+ int pos;
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+ int sr;
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+};
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+
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+#define NORMAL_SPEED 100000 /* FAST_SPEED 400000 */
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+
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+/* Register offsets */
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+#define ICDR(pd) (pd->reg + 0x00)
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+#define ICCR(pd) (pd->reg + 0x04)
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+#define ICSR(pd) (pd->reg + 0x08)
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+#define ICIC(pd) (pd->reg + 0x0c)
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+#define ICCL(pd) (pd->reg + 0x10)
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+#define ICCH(pd) (pd->reg + 0x14)
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+
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+/* Register bits */
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+#define ICCR_ICE 0x80
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+#define ICCR_RACK 0x40
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+#define ICCR_TRS 0x10
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+#define ICCR_BBSY 0x04
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+#define ICCR_SCP 0x01
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+
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+#define ICSR_SCLM 0x80
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+#define ICSR_SDAM 0x40
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+#define SW_DONE 0x20
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+#define ICSR_BUSY 0x10
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+#define ICSR_AL 0x08
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+#define ICSR_TACK 0x04
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+#define ICSR_WAIT 0x02
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+#define ICSR_DTE 0x01
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+
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+#define ICIC_ALE 0x08
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+#define ICIC_TACKE 0x04
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+#define ICIC_WAITE 0x02
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+#define ICIC_DTEE 0x01
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+
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+static void activate_ch(struct sh_mobile_i2c_data *pd)
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+{
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+ /* Make sure the clock is enabled */
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+ clk_enable(pd->clk);
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+
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+ /* Enable channel and configure rx ack */
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+ iowrite8(ioread8(ICCR(pd)) | ICCR_ICE, ICCR(pd));
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+
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+ /* Mask all interrupts */
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+ iowrite8(0, ICIC(pd));
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+
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+ /* Set the clock */
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+ iowrite8(pd->iccl, ICCL(pd));
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+ iowrite8(pd->icch, ICCH(pd));
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+}
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+
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+static void deactivate_ch(struct sh_mobile_i2c_data *pd)
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+{
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+ /* Clear/disable interrupts */
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+ iowrite8(0, ICSR(pd));
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+ iowrite8(0, ICIC(pd));
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+
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+ /* Disable channel */
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+ iowrite8(ioread8(ICCR(pd)) & ~ICCR_ICE, ICCR(pd));
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+
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+ /* Disable clock */
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+ clk_disable(pd->clk);
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+}
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+
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+static unsigned char i2c_op(struct sh_mobile_i2c_data *pd,
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+ enum sh_mobile_i2c_op op, unsigned char data)
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+{
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+ unsigned char ret = 0;
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+ unsigned long flags;
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+
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+ dev_dbg(pd->dev, "op %d, data in 0x%02x\n", op, data);
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+
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+ spin_lock_irqsave(&pd->lock, flags);
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+
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+ switch (op) {
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+ case OP_START:
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+ iowrite8(0x94, ICCR(pd));
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+ break;
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+ case OP_TX_ONLY:
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+ iowrite8(data, ICDR(pd));
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+ break;
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+ case OP_TX_STOP:
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+ iowrite8(data, ICDR(pd));
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+ iowrite8(0x90, ICCR(pd));
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+ iowrite8(ICIC_ALE | ICIC_TACKE, ICIC(pd));
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+ break;
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+ case OP_TX_TO_RX:
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+ iowrite8(data, ICDR(pd));
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+ iowrite8(0x81, ICCR(pd));
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+ break;
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+ case OP_RX_ONLY:
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+ ret = ioread8(ICDR(pd));
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+ break;
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+ case OP_RX_STOP:
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+ ret = ioread8(ICDR(pd));
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+ iowrite8(0xc0, ICCR(pd));
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+ break;
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+ }
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+
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+ spin_unlock_irqrestore(&pd->lock, flags);
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+
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+ dev_dbg(pd->dev, "op %d, data out 0x%02x\n", op, ret);
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+ return ret;
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+}
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+
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+static irqreturn_t sh_mobile_i2c_isr(int irq, void *dev_id)
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+{
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+ struct platform_device *dev = dev_id;
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+ struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
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+ struct i2c_msg *msg = pd->msg;
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+ unsigned char data, sr;
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+ int wakeup = 0;
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+
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+ sr = ioread8(ICSR(pd));
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+ pd->sr |= sr;
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+
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+ dev_dbg(pd->dev, "i2c_isr 0x%02x 0x%02x %s %d %d!\n", sr, pd->sr,
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+ (msg->flags & I2C_M_RD) ? "read" : "write",
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+ pd->pos, msg->len);
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+
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+ if (sr & (ICSR_AL | ICSR_TACK)) {
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+ iowrite8(0, ICIC(pd)); /* disable interrupts */
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+ wakeup = 1;
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+ goto do_wakeup;
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+ }
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+
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+ if (pd->pos == msg->len) {
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+ i2c_op(pd, OP_RX_ONLY, 0);
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+ wakeup = 1;
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+ goto do_wakeup;
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+ }
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+
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+ if (pd->pos == -1) {
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+ data = (msg->addr & 0x7f) << 1;
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+ data |= (msg->flags & I2C_M_RD) ? 1 : 0;
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+ } else
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+ data = msg->buf[pd->pos];
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+
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+ if ((pd->pos == -1) || !(msg->flags & I2C_M_RD)) {
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+ if (msg->flags & I2C_M_RD)
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+ i2c_op(pd, OP_TX_TO_RX, data);
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+ else if (pd->pos == (msg->len - 1)) {
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+ i2c_op(pd, OP_TX_STOP, data);
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+ wakeup = 1;
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+ } else
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+ i2c_op(pd, OP_TX_ONLY, data);
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+ } else {
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+ if (pd->pos == (msg->len - 1))
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+ data = i2c_op(pd, OP_RX_STOP, 0);
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+ else
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+ data = i2c_op(pd, OP_RX_ONLY, 0);
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+
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+ msg->buf[pd->pos] = data;
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+ }
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+ pd->pos++;
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+
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+ do_wakeup:
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+ if (wakeup) {
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+ pd->sr |= SW_DONE;
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+ wake_up(&pd->wait);
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+ }
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+
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+ return IRQ_HANDLED;
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+}
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+
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+static int start_ch(struct sh_mobile_i2c_data *pd, struct i2c_msg *usr_msg)
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+{
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+ /* Initialize channel registers */
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+ iowrite8(ioread8(ICCR(pd)) & ~ICCR_ICE, ICCR(pd));
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+
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+ /* Enable channel and configure rx ack */
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+ iowrite8(ioread8(ICCR(pd)) | ICCR_ICE, ICCR(pd));
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+
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+ /* Set the clock */
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+ iowrite8(pd->iccl, ICCL(pd));
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+ iowrite8(pd->icch, ICCH(pd));
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+
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+ pd->msg = usr_msg;
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+ pd->pos = -1;
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+ pd->sr = 0;
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+
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+ /* Enable all interrupts except wait */
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+ iowrite8(ioread8(ICIC(pd)) | ICIC_ALE | ICIC_TACKE | ICIC_DTEE,
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+ ICIC(pd));
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+ return 0;
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+}
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+
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+static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter,
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+ struct i2c_msg *msgs,
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+ int num)
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+{
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+ struct sh_mobile_i2c_data *pd = i2c_get_adapdata(adapter);
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+ struct i2c_msg *msg;
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+ int err = 0;
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+ u_int8_t val;
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+ int i, k, retry_count;
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+
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+ activate_ch(pd);
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+
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+ /* Process all messages */
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+ for (i = 0; i < num; i++) {
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+ msg = &msgs[i];
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+
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+ err = start_ch(pd, msg);
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+ if (err)
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+ break;
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+
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+ i2c_op(pd, OP_START, 0);
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+
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+ /* The interrupt handler takes care of the rest... */
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+ k = wait_event_timeout(pd->wait,
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+ pd->sr & (ICSR_TACK | SW_DONE),
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+ 5 * HZ);
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+ if (!k)
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+ dev_err(pd->dev, "Transfer request timed out\n");
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+
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+ retry_count = 10;
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+again:
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+ val = ioread8(ICSR(pd));
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+
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+ dev_dbg(pd->dev, "val 0x%02x pd->sr 0x%02x\n", val, pd->sr);
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+
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+ if ((val | pd->sr) & (ICSR_TACK | ICSR_AL)) {
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+ err = -EIO;
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+ break;
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+ }
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+
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+ /* the interrupt handler may wake us up before the
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+ * transfer is finished, so poll the hardware
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+ * until we're done.
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+ */
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+
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+ if (!(!(val & ICSR_BUSY) && (val & ICSR_SCLM) &&
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+ (val & ICSR_SDAM))) {
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+ msleep(1);
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+ if (retry_count--)
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+ goto again;
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+
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+ err = -EIO;
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+ dev_err(pd->dev, "Polling timed out\n");
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+ break;
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+ }
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+ }
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+
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+ deactivate_ch(pd);
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+
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+ if (!err)
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+ err = num;
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+ return err;
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+}
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+
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+static u32 sh_mobile_i2c_func(struct i2c_adapter *adapter)
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+{
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+ return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
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+}
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+
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+static struct i2c_algorithm sh_mobile_i2c_algorithm = {
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+ .functionality = sh_mobile_i2c_func,
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+ .master_xfer = sh_mobile_i2c_xfer,
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+};
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+
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+static void sh_mobile_i2c_setup_channel(struct platform_device *dev)
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+{
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+ struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
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+ unsigned long peripheral_clk = clk_get_rate(pd->clk);
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+ u_int32_t num;
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+ u_int32_t denom;
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+ u_int32_t tmp;
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+
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+ spin_lock_init(&pd->lock);
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+ init_waitqueue_head(&pd->wait);
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+
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+ /* Calculate the value for iccl. From the data sheet:
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+ * iccl = (p clock / transfer rate) * (L / (L + H))
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+ * where L and H are the SCL low/high ratio (5/4 in this case).
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+ * We also round off the result.
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+ */
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+ num = peripheral_clk * 5;
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+ denom = NORMAL_SPEED * 9;
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+ tmp = num * 10 / denom;
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+ if (tmp % 10 >= 5)
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+ pd->iccl = (u_int8_t)((num/denom) + 1);
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+ else
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+ pd->iccl = (u_int8_t)(num/denom);
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+
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+ /* Calculate the value for icch. From the data sheet:
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+ icch = (p clock / transfer rate) * (H / (L + H)) */
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+ num = peripheral_clk * 4;
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+ tmp = num * 10 / denom;
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+ if (tmp % 10 >= 5)
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+ pd->icch = (u_int8_t)((num/denom) + 1);
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+ else
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+ pd->icch = (u_int8_t)(num/denom);
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+}
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+
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+static int sh_mobile_i2c_hook_irqs(struct platform_device *dev, int hook)
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+{
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+ struct resource *res;
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+ int ret = -ENXIO;
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+ int q, m;
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+ int k = 0;
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+ int n = 0;
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+
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+ while ((res = platform_get_resource(dev, IORESOURCE_IRQ, k))) {
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+ for (n = res->start; hook && n <= res->end; n++) {
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+ if (request_irq(n, sh_mobile_i2c_isr, IRQF_DISABLED,
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+ dev->dev.bus_id, dev))
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+ goto rollback;
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+ }
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+ k++;
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+ }
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+
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+ if (hook)
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+ return k > 0 ? 0 : -ENOENT;
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+
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+ k--;
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+ ret = 0;
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+
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+ rollback:
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+ for (q = k; k >= 0; k--) {
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+ for (m = n; m >= res->start; m--)
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+ free_irq(m, dev);
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+
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+ res = platform_get_resource(dev, IORESOURCE_IRQ, k - 1);
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+ m = res->end;
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+ }
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+
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+ return ret;
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+}
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+
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+static int sh_mobile_i2c_probe(struct platform_device *dev)
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+{
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+ struct sh_mobile_i2c_data *pd;
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+ struct i2c_adapter *adap;
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+ struct resource *res;
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+ int size;
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+ int ret;
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+
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+ pd = kzalloc(sizeof(struct sh_mobile_i2c_data), GFP_KERNEL);
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+ if (pd == NULL) {
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+ dev_err(&dev->dev, "cannot allocate private data\n");
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+ return -ENOMEM;
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+ }
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+
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+ pd->clk = clk_get(&dev->dev, "peripheral_clk");
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+ if (IS_ERR(pd->clk)) {
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+ dev_err(&dev->dev, "cannot get peripheral clock\n");
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+ ret = PTR_ERR(pd->clk);
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+ goto err;
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+ }
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+
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+ ret = sh_mobile_i2c_hook_irqs(dev, 1);
|
|
|
+ if (ret) {
|
|
|
+ dev_err(&dev->dev, "cannot request IRQ\n");
|
|
|
+ goto err_clk;
|
|
|
+ }
|
|
|
+
|
|
|
+ pd->dev = &dev->dev;
|
|
|
+ platform_set_drvdata(dev, pd);
|
|
|
+
|
|
|
+ res = platform_get_resource(dev, IORESOURCE_MEM, 0);
|
|
|
+ if (res == NULL) {
|
|
|
+ dev_err(&dev->dev, "cannot find IO resource\n");
|
|
|
+ ret = -ENOENT;
|
|
|
+ goto err_irq;
|
|
|
+ }
|
|
|
+
|
|
|
+ size = (res->end - res->start) + 1;
|
|
|
+
|
|
|
+ pd->reg = ioremap(res->start, size);
|
|
|
+ if (pd->reg == NULL) {
|
|
|
+ dev_err(&dev->dev, "cannot map IO\n");
|
|
|
+ ret = -ENXIO;
|
|
|
+ goto err_irq;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* setup the private data */
|
|
|
+ adap = &pd->adap;
|
|
|
+ i2c_set_adapdata(adap, pd);
|
|
|
+
|
|
|
+ adap->owner = THIS_MODULE;
|
|
|
+ adap->algo = &sh_mobile_i2c_algorithm;
|
|
|
+ adap->dev.parent = &dev->dev;
|
|
|
+ adap->retries = 5;
|
|
|
+ adap->nr = dev->id;
|
|
|
+
|
|
|
+ strlcpy(adap->name, dev->name, sizeof(adap->name));
|
|
|
+
|
|
|
+ sh_mobile_i2c_setup_channel(dev);
|
|
|
+
|
|
|
+ ret = i2c_add_numbered_adapter(adap);
|
|
|
+ if (ret < 0) {
|
|
|
+ dev_err(&dev->dev, "cannot add numbered adapter\n");
|
|
|
+ goto err_all;
|
|
|
+ }
|
|
|
+
|
|
|
+ return 0;
|
|
|
+
|
|
|
+ err_all:
|
|
|
+ iounmap(pd->reg);
|
|
|
+ err_irq:
|
|
|
+ sh_mobile_i2c_hook_irqs(dev, 0);
|
|
|
+ err_clk:
|
|
|
+ clk_put(pd->clk);
|
|
|
+ err:
|
|
|
+ kfree(pd);
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static int sh_mobile_i2c_remove(struct platform_device *dev)
|
|
|
+{
|
|
|
+ struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
|
|
|
+
|
|
|
+ i2c_del_adapter(&pd->adap);
|
|
|
+ iounmap(pd->reg);
|
|
|
+ sh_mobile_i2c_hook_irqs(dev, 0);
|
|
|
+ clk_put(pd->clk);
|
|
|
+ kfree(pd);
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static struct platform_driver sh_mobile_i2c_driver = {
|
|
|
+ .driver = {
|
|
|
+ .name = "i2c-sh_mobile",
|
|
|
+ .owner = THIS_MODULE,
|
|
|
+ },
|
|
|
+ .probe = sh_mobile_i2c_probe,
|
|
|
+ .remove = sh_mobile_i2c_remove,
|
|
|
+};
|
|
|
+
|
|
|
+static int __init sh_mobile_i2c_adap_init(void)
|
|
|
+{
|
|
|
+ return platform_driver_register(&sh_mobile_i2c_driver);
|
|
|
+}
|
|
|
+
|
|
|
+static void __exit sh_mobile_i2c_adap_exit(void)
|
|
|
+{
|
|
|
+ platform_driver_unregister(&sh_mobile_i2c_driver);
|
|
|
+}
|
|
|
+
|
|
|
+module_init(sh_mobile_i2c_adap_init);
|
|
|
+module_exit(sh_mobile_i2c_adap_exit);
|
|
|
+
|
|
|
+MODULE_DESCRIPTION("SuperH Mobile I2C Bus Controller driver");
|
|
|
+MODULE_AUTHOR("Magnus Damm");
|
|
|
+MODULE_LICENSE("GPL v2");
|