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@@ -1,5 +1,267 @@
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-#ifdef __uClinux__
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-#include "tlbflush_no.h"
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+#ifndef _M68K_TLBFLUSH_H
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+#define _M68K_TLBFLUSH_H
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+
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+#ifdef CONFIG_MMU
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+#ifndef CONFIG_SUN3
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+
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+#include <asm/current.h>
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+
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+static inline void flush_tlb_kernel_page(void *addr)
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+{
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+ if (CPU_IS_040_OR_060) {
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+ mm_segment_t old_fs = get_fs();
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+ set_fs(KERNEL_DS);
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+ __asm__ __volatile__(".chip 68040\n\t"
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+ "pflush (%0)\n\t"
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+ ".chip 68k"
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+ : : "a" (addr));
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+ set_fs(old_fs);
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+ } else if (CPU_IS_020_OR_030)
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+ __asm__ __volatile__("pflush #4,#4,(%0)" : : "a" (addr));
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+}
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+
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+/*
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+ * flush all user-space atc entries.
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+ */
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+static inline void __flush_tlb(void)
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+{
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+ if (CPU_IS_040_OR_060)
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+ __asm__ __volatile__(".chip 68040\n\t"
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+ "pflushan\n\t"
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+ ".chip 68k");
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+ else if (CPU_IS_020_OR_030)
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+ __asm__ __volatile__("pflush #0,#4");
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+}
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+
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+static inline void __flush_tlb040_one(unsigned long addr)
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+{
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+ __asm__ __volatile__(".chip 68040\n\t"
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+ "pflush (%0)\n\t"
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+ ".chip 68k"
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+ : : "a" (addr));
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+}
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+
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+static inline void __flush_tlb_one(unsigned long addr)
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+{
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+ if (CPU_IS_040_OR_060)
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+ __flush_tlb040_one(addr);
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+ else if (CPU_IS_020_OR_030)
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+ __asm__ __volatile__("pflush #0,#4,(%0)" : : "a" (addr));
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+}
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+
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+#define flush_tlb() __flush_tlb()
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+
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+/*
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+ * flush all atc entries (both kernel and user-space entries).
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+ */
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+static inline void flush_tlb_all(void)
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+{
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+ if (CPU_IS_040_OR_060)
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+ __asm__ __volatile__(".chip 68040\n\t"
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+ "pflusha\n\t"
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+ ".chip 68k");
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+ else if (CPU_IS_020_OR_030)
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+ __asm__ __volatile__("pflusha");
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+}
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+
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+static inline void flush_tlb_mm(struct mm_struct *mm)
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+{
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+ if (mm == current->active_mm)
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+ __flush_tlb();
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+}
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+
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+static inline void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
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+{
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+ if (vma->vm_mm == current->active_mm) {
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+ mm_segment_t old_fs = get_fs();
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+ set_fs(USER_DS);
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+ __flush_tlb_one(addr);
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+ set_fs(old_fs);
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+ }
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+}
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+
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+static inline void flush_tlb_range(struct vm_area_struct *vma,
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+ unsigned long start, unsigned long end)
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+{
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+ if (vma->vm_mm == current->active_mm)
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+ __flush_tlb();
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+}
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+
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+static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end)
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+{
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+ flush_tlb_all();
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+}
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+
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#else
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#else
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-#include "tlbflush_mm.h"
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+
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+
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+/* Reserved PMEGs. */
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+extern char sun3_reserved_pmeg[SUN3_PMEGS_NUM];
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+extern unsigned long pmeg_vaddr[SUN3_PMEGS_NUM];
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+extern unsigned char pmeg_alloc[SUN3_PMEGS_NUM];
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+extern unsigned char pmeg_ctx[SUN3_PMEGS_NUM];
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+
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+/* Flush all userspace mappings one by one... (why no flush command,
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+ sun?) */
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+static inline void flush_tlb_all(void)
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+{
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+ unsigned long addr;
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+ unsigned char ctx, oldctx;
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+
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+ oldctx = sun3_get_context();
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+ for(addr = 0x00000000; addr < TASK_SIZE; addr += SUN3_PMEG_SIZE) {
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+ for(ctx = 0; ctx < 8; ctx++) {
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+ sun3_put_context(ctx);
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+ sun3_put_segmap(addr, SUN3_INVALID_PMEG);
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+ }
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+ }
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+
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+ sun3_put_context(oldctx);
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+ /* erase all of the userspace pmeg maps, we've clobbered them
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+ all anyway */
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+ for(addr = 0; addr < SUN3_INVALID_PMEG; addr++) {
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+ if(pmeg_alloc[addr] == 1) {
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+ pmeg_alloc[addr] = 0;
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+ pmeg_ctx[addr] = 0;
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+ pmeg_vaddr[addr] = 0;
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+ }
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+ }
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+
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+}
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+
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+/* Clear user TLB entries within the context named in mm */
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+static inline void flush_tlb_mm (struct mm_struct *mm)
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+{
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+ unsigned char oldctx;
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+ unsigned char seg;
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+ unsigned long i;
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+
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+ oldctx = sun3_get_context();
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+ sun3_put_context(mm->context);
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+
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+ for(i = 0; i < TASK_SIZE; i += SUN3_PMEG_SIZE) {
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+ seg = sun3_get_segmap(i);
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+ if(seg == SUN3_INVALID_PMEG)
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+ continue;
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+
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+ sun3_put_segmap(i, SUN3_INVALID_PMEG);
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+ pmeg_alloc[seg] = 0;
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+ pmeg_ctx[seg] = 0;
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+ pmeg_vaddr[seg] = 0;
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+ }
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+
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+ sun3_put_context(oldctx);
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+
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+}
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+
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+/* Flush a single TLB page. In this case, we're limited to flushing a
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+ single PMEG */
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+static inline void flush_tlb_page (struct vm_area_struct *vma,
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+ unsigned long addr)
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+{
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+ unsigned char oldctx;
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+ unsigned char i;
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+
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+ oldctx = sun3_get_context();
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+ sun3_put_context(vma->vm_mm->context);
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+ addr &= ~SUN3_PMEG_MASK;
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+ if((i = sun3_get_segmap(addr)) != SUN3_INVALID_PMEG)
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+ {
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+ pmeg_alloc[i] = 0;
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+ pmeg_ctx[i] = 0;
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+ pmeg_vaddr[i] = 0;
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+ sun3_put_segmap (addr, SUN3_INVALID_PMEG);
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+ }
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+ sun3_put_context(oldctx);
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+
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+}
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+/* Flush a range of pages from TLB. */
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+
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+static inline void flush_tlb_range (struct vm_area_struct *vma,
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+ unsigned long start, unsigned long end)
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+{
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+ struct mm_struct *mm = vma->vm_mm;
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+ unsigned char seg, oldctx;
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+
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+ start &= ~SUN3_PMEG_MASK;
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+
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+ oldctx = sun3_get_context();
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+ sun3_put_context(mm->context);
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+
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+ while(start < end)
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+ {
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+ if((seg = sun3_get_segmap(start)) == SUN3_INVALID_PMEG)
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+ goto next;
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+ if(pmeg_ctx[seg] == mm->context) {
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+ pmeg_alloc[seg] = 0;
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+ pmeg_ctx[seg] = 0;
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+ pmeg_vaddr[seg] = 0;
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+ }
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+ sun3_put_segmap(start, SUN3_INVALID_PMEG);
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+ next:
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+ start += SUN3_PMEG_SIZE;
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+ }
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+}
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+
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+static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end)
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+{
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+ flush_tlb_all();
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+}
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+
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+/* Flush kernel page from TLB. */
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+static inline void flush_tlb_kernel_page (unsigned long addr)
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+{
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+ sun3_put_segmap (addr & ~(SUN3_PMEG_SIZE - 1), SUN3_INVALID_PMEG);
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+}
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+
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#endif
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#endif
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+
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+#else /* !CONFIG_MMU */
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+
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+/*
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+ * flush all user-space atc entries.
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+ */
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+static inline void __flush_tlb(void)
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+{
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+ BUG();
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+}
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+
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+static inline void __flush_tlb_one(unsigned long addr)
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+{
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+ BUG();
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+}
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+
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+#define flush_tlb() __flush_tlb()
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+
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+/*
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+ * flush all atc entries (both kernel and user-space entries).
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+ */
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+static inline void flush_tlb_all(void)
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+{
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+ BUG();
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+}
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+
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+static inline void flush_tlb_mm(struct mm_struct *mm)
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+{
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+ BUG();
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+}
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+
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+static inline void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
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+{
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+ BUG();
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+}
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+
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+static inline void flush_tlb_range(struct mm_struct *mm,
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+ unsigned long start, unsigned long end)
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+{
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+ BUG();
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+}
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+
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+static inline void flush_tlb_kernel_page(unsigned long addr)
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+{
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+ BUG();
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+}
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+
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+#endif /* CONFIG_MMU */
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+
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+#endif /* _M68K_TLBFLUSH_H */
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