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@@ -42,6 +42,13 @@
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#include "nouveau_connector.h"
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#include "nv50_display.h"
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+static DEFINE_RATELIMIT_STATE(nouveau_ratelimit_state, 3 * HZ, 20);
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+
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+static int nouveau_ratelimit(void)
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+{
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+ return __ratelimit(&nouveau_ratelimit_state);
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+}
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+
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void
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nouveau_irq_preinstall(struct drm_device *dev)
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{
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@@ -213,11 +220,12 @@ nouveau_fifo_irq_handler(struct drm_device *dev)
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u32 ib_get = nv_rd32(dev, 0x003334);
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u32 ib_put = nv_rd32(dev, 0x003330);
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- NV_INFO(dev, "PFIFO_DMA_PUSHER - Ch %d Get 0x%02x%08x "
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+ if (nouveau_ratelimit())
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+ NV_INFO(dev, "PFIFO_DMA_PUSHER - Ch %d Get 0x%02x%08x "
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"Put 0x%02x%08x IbGet 0x%08x IbPut 0x%08x "
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"State 0x%08x Push 0x%08x\n",
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- chid, ho_get, get, ho_put, put, ib_get, ib_put,
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- state, push);
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+ chid, ho_get, get, ho_put, put,
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+ ib_get, ib_put, state, push);
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/* METHOD_COUNT, in DMA_STATE on earlier chipsets */
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nv_wr32(dev, 0x003364, 0x00000000);
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@@ -266,8 +274,9 @@ nouveau_fifo_irq_handler(struct drm_device *dev)
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}
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if (status) {
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- NV_INFO(dev, "PFIFO_INTR 0x%08x - Ch %d\n",
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- status, chid);
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+ if (nouveau_ratelimit())
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+ NV_INFO(dev, "PFIFO_INTR 0x%08x - Ch %d\n",
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+ status, chid);
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nv_wr32(dev, NV03_PFIFO_INTR_0, status);
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status = 0;
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}
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@@ -544,13 +553,6 @@ nouveau_pgraph_intr_notify(struct drm_device *dev, uint32_t nsource)
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nouveau_graph_dump_trap_info(dev, "PGRAPH_NOTIFY", &trap);
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}
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-static DEFINE_RATELIMIT_STATE(nouveau_ratelimit_state, 3 * HZ, 20);
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-
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-static int nouveau_ratelimit(void)
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-{
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- return __ratelimit(&nouveau_ratelimit_state);
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-}
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-
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static inline void
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nouveau_pgraph_intr_error(struct drm_device *dev, uint32_t nsource)
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