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@@ -3529,108 +3529,40 @@ static void ohci1394_pci_remove(struct pci_dev *pdev)
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}
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}
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#ifdef CONFIG_PM
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#ifdef CONFIG_PM
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-static int ohci1394_pci_resume (struct pci_dev *pdev)
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+static int ohci1394_pci_suspend(struct pci_dev *pdev, pm_message_t state)
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{
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{
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int err;
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int err;
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- struct ti_ohci *ohci;
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-
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-/* PowerMac resume code comes first */
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-#ifdef CONFIG_PPC_PMAC
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- if (machine_is(powermac)) {
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- struct device_node *of_node;
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-
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- /* Re-enable 1394 */
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- of_node = pci_device_to_OF_node (pdev);
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- if (of_node)
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- pmac_call_feature (PMAC_FTR_1394_ENABLE, of_node, 0, 1);
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- }
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-#endif /* CONFIG_PPC_PMAC */
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-
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- pci_set_power_state(pdev, PCI_D0);
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- pci_restore_state(pdev);
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- err = pci_enable_device(pdev);
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- if (err)
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- return err;
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-
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- ohci = pci_get_drvdata(pdev);
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- if (!ohci)
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- return -1; /* or which exit status to use? */
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-
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- PRINT(KERN_DEBUG, "resume called");
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-
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- /* The following lines are copied from ohci1394_pci_probe(): */
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-
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- /* Start off with a soft reset, to clear everything to a sane
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- * state. */
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- ohci_soft_reset(ohci);
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-
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- /* Now enable LPS, which we need in order to start accessing
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- * most of the registers. In fact, on some cards (ALI M5251),
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- * accessing registers in the SClk domain without LPS enabled
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- * will lock up the machine. Wait 50msec to make sure we have
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- * full link enabled. */
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- reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_LPS);
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-
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- /* Disable and clear interrupts */
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- reg_write(ohci, OHCI1394_IntEventClear, 0xffffffff);
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- reg_write(ohci, OHCI1394_IntMaskClear, 0xffffffff);
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-
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- mdelay(50);
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-
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- ohci_initialize(ohci);
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-
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- return 0;
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-}
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-
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-static int ohci1394_pci_suspend (struct pci_dev *pdev, pm_message_t state)
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-{
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- int err;
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- struct ti_ohci *ohci;
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-
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- ohci = pci_get_drvdata(pdev);
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- if (!ohci)
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- return -1; /* Not sure if this is the correct return code */
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+ struct ti_ohci *ohci = pci_get_drvdata(pdev);
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PRINT(KERN_DEBUG, "suspend called");
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PRINT(KERN_DEBUG, "suspend called");
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+ if (!ohci)
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+ return -ENXIO;
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- /* clear the async DMA contexts and stop using the controller: */
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+ /* Clear the async DMA contexts and stop using the controller */
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hpsb_bus_reset(ohci->host);
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hpsb_bus_reset(ohci->host);
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- /* The following calls are from ohci1394_pci_remove(): */
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-
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- /* Clear out BUS Options */
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+ /* See ohci1394_pci_remove() for comments on this sequence */
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reg_write(ohci, OHCI1394_ConfigROMhdr, 0);
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reg_write(ohci, OHCI1394_ConfigROMhdr, 0);
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reg_write(ohci, OHCI1394_BusOptions,
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reg_write(ohci, OHCI1394_BusOptions,
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(reg_read(ohci, OHCI1394_BusOptions) & 0x0000f007) |
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(reg_read(ohci, OHCI1394_BusOptions) & 0x0000f007) |
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0x00ff0000);
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0x00ff0000);
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-
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- /* Clear interrupt registers */
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reg_write(ohci, OHCI1394_IntMaskClear, 0xffffffff);
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reg_write(ohci, OHCI1394_IntMaskClear, 0xffffffff);
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reg_write(ohci, OHCI1394_IntEventClear, 0xffffffff);
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reg_write(ohci, OHCI1394_IntEventClear, 0xffffffff);
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reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, 0xffffffff);
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reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, 0xffffffff);
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reg_write(ohci, OHCI1394_IsoXmitIntEventClear, 0xffffffff);
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reg_write(ohci, OHCI1394_IsoXmitIntEventClear, 0xffffffff);
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reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, 0xffffffff);
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reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, 0xffffffff);
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reg_write(ohci, OHCI1394_IsoRecvIntEventClear, 0xffffffff);
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reg_write(ohci, OHCI1394_IsoRecvIntEventClear, 0xffffffff);
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-
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- /* Disable IRM Contender */
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set_phy_reg(ohci, 4, ~0xc0 & get_phy_reg(ohci, 4));
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set_phy_reg(ohci, 4, ~0xc0 & get_phy_reg(ohci, 4));
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-
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- /* Clear link control register */
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reg_write(ohci, OHCI1394_LinkControlClear, 0xffffffff);
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reg_write(ohci, OHCI1394_LinkControlClear, 0xffffffff);
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-
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- /* Let all other nodes know to ignore us */
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ohci_devctl(ohci->host, RESET_BUS, LONG_RESET_NO_FORCE_ROOT);
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ohci_devctl(ohci->host, RESET_BUS, LONG_RESET_NO_FORCE_ROOT);
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-
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- /* This stops all DMA contexts, disables interrupts,
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- * and clears linkEnable and LPS: */
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ohci_soft_reset(ohci);
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ohci_soft_reset(ohci);
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err = pci_save_state(pdev);
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err = pci_save_state(pdev);
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if (err)
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if (err)
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- goto out;
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+ return err;
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err = pci_set_power_state(pdev, pci_choose_state(pdev, state));
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err = pci_set_power_state(pdev, pci_choose_state(pdev, state));
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if (err)
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if (err)
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- goto out;
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+ return err;
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/* PowerMac suspend code comes last */
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/* PowerMac suspend code comes last */
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#ifdef CONFIG_PPC_PMAC
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#ifdef CONFIG_PPC_PMAC
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@@ -3643,8 +3575,46 @@ static int ohci1394_pci_suspend (struct pci_dev *pdev, pm_message_t state)
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pmac_call_feature(PMAC_FTR_1394_ENABLE, of_node, 0, 0);
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pmac_call_feature(PMAC_FTR_1394_ENABLE, of_node, 0, 0);
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}
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}
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#endif /* CONFIG_PPC_PMAC */
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#endif /* CONFIG_PPC_PMAC */
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-out:
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- return err;
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+
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+ return 0;
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+}
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+
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+static int ohci1394_pci_resume(struct pci_dev *pdev)
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+{
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+ int err;
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+ struct ti_ohci *ohci = pci_get_drvdata(pdev);
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+
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+ PRINT(KERN_DEBUG, "resume called");
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+ if (!ohci)
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+ return -ENXIO;
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+
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+/* PowerMac resume code comes first */
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+#ifdef CONFIG_PPC_PMAC
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+ if (machine_is(powermac)) {
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+ struct device_node *of_node;
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+
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+ /* Re-enable 1394 */
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+ of_node = pci_device_to_OF_node (pdev);
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+ if (of_node)
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+ pmac_call_feature (PMAC_FTR_1394_ENABLE, of_node, 0, 1);
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+ }
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+#endif /* CONFIG_PPC_PMAC */
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+
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+ pci_set_power_state(pdev, PCI_D0);
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+ pci_restore_state(pdev);
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+ err = pci_enable_device(pdev);
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+ if (err)
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+ return err;
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+
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+ /* See ohci1394_pci_probe() for comments on this sequence */
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+ ohci_soft_reset(ohci);
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+ reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_LPS);
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+ reg_write(ohci, OHCI1394_IntEventClear, 0xffffffff);
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+ reg_write(ohci, OHCI1394_IntMaskClear, 0xffffffff);
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+ mdelay(50);
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+ ohci_initialize(ohci);
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+
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+ return 0;
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}
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}
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#endif /* CONFIG_PM */
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#endif /* CONFIG_PM */
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