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@@ -0,0 +1,524 @@
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+/*
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+ * FCI FC2580 silicon tuner driver
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+ *
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+ * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License along
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+ * with this program; if not, write to the Free Software Foundation, Inc.,
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+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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+ */
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+
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+#include "fc2580_priv.h"
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+
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+/*
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+ * TODO:
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+ * I2C write and read works only for one single register. Multiple registers
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+ * could not be accessed using normal register address auto-increment.
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+ * There could be (very likely) register to change that behavior....
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+ *
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+ * Due to that limitation functions:
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+ * fc2580_wr_regs()
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+ * fc2580_rd_regs()
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+ * could not be used for accessing more than one register at once.
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+ *
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+ * TODO:
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+ * Currently it blind writes bunch of static registers from the
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+ * fc2580_freq_regs_lut[] when fc2580_set_params() is called. Add some
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+ * logic to reduce unneeded register writes.
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+ * There is also don't-care registers, initialized with value 0xff, and those
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+ * are also written to the chip currently (yes, not wise).
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+ */
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+
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+/* write multiple registers */
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+static int fc2580_wr_regs(struct fc2580_priv *priv, u8 reg, u8 *val, int len)
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+{
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+ int ret;
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+ u8 buf[1 + len];
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+ struct i2c_msg msg[1] = {
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+ {
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+ .addr = priv->cfg->i2c_addr,
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+ .flags = 0,
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+ .len = sizeof(buf),
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+ .buf = buf,
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+ }
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+ };
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+
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+ buf[0] = reg;
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+ memcpy(&buf[1], val, len);
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+
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+ ret = i2c_transfer(priv->i2c, msg, 1);
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+ if (ret == 1) {
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+ ret = 0;
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+ } else {
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+ dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%02x " \
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+ "len=%d\n", KBUILD_MODNAME, ret, reg, len);
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+ ret = -EREMOTEIO;
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+ }
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+ return ret;
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+}
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+
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+/* read multiple registers */
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+static int fc2580_rd_regs(struct fc2580_priv *priv, u8 reg, u8 *val, int len)
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+{
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+ int ret;
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+ u8 buf[len];
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+ struct i2c_msg msg[2] = {
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+ {
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+ .addr = priv->cfg->i2c_addr,
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+ .flags = 0,
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+ .len = 1,
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+ .buf = ®,
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+ }, {
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+ .addr = priv->cfg->i2c_addr,
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+ .flags = I2C_M_RD,
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+ .len = sizeof(buf),
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+ .buf = buf,
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+ }
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+ };
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+
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+ ret = i2c_transfer(priv->i2c, msg, 2);
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+ if (ret == 2) {
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+ memcpy(val, buf, len);
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+ ret = 0;
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+ } else {
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+ dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%02x " \
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+ "len=%d\n", KBUILD_MODNAME, ret, reg, len);
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+ ret = -EREMOTEIO;
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+ }
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+
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+ return ret;
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+}
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+
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+/* write single register */
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+static int fc2580_wr_reg(struct fc2580_priv *priv, u8 reg, u8 val)
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+{
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+ return fc2580_wr_regs(priv, reg, &val, 1);
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+}
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+
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+/* read single register */
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+static int fc2580_rd_reg(struct fc2580_priv *priv, u8 reg, u8 *val)
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+{
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+ return fc2580_rd_regs(priv, reg, val, 1);
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+}
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+
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+static int fc2580_set_params(struct dvb_frontend *fe)
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+{
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+ struct fc2580_priv *priv = fe->tuner_priv;
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+ struct dtv_frontend_properties *c = &fe->dtv_property_cache;
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+ int ret, i;
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+ unsigned int r_val, n_val, k_val, k_val_reg, f_ref;
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+ u8 tmp_val, r18_val;
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+ u64 f_vco;
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+
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+ /*
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+ * Fractional-N synthesizer/PLL.
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+ * Most likely all those PLL calculations are not correct. I am not
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+ * sure, but it looks like it is divider based Fractional-N synthesizer.
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+ * There is divider for reference clock too?
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+ * Anyhow, synthesizer calculation results seems to be quite correct.
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+ */
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+
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+ dev_dbg(&priv->i2c->dev, "%s: delivery_system=%d frequency=%d " \
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+ "bandwidth_hz=%d\n", __func__,
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+ c->delivery_system, c->frequency, c->bandwidth_hz);
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+
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+ if (fe->ops.i2c_gate_ctrl)
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+ fe->ops.i2c_gate_ctrl(fe, 1);
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+
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+ /* PLL */
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+ for (i = 0; i < ARRAY_SIZE(fc2580_pll_lut); i++) {
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+ if (c->frequency <= fc2580_pll_lut[i].freq)
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+ break;
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+ }
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+
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+ if (i == ARRAY_SIZE(fc2580_pll_lut))
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+ goto err;
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+
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+ f_vco = c->frequency;
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+ f_vco *= fc2580_pll_lut[i].div;
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+
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+ if (f_vco >= 2600000000)
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+ tmp_val = 0x0e | fc2580_pll_lut[i].band;
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+ else
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+ tmp_val = 0x06 | fc2580_pll_lut[i].band;
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+
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+ ret = fc2580_wr_reg(priv, 0x02, tmp_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ if (f_vco >= 2UL * 76 * priv->cfg->clock) {
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+ r_val = 1;
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+ r18_val = 0x00;
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+ } else if (f_vco >= 1UL * 76 * priv->cfg->clock) {
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+ r_val = 2;
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+ r18_val = 0x10;
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+ } else {
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+ r_val = 4;
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+ r18_val = 0x20;
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+ }
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+
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+ f_ref = 2UL * priv->cfg->clock / r_val;
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+ n_val = f_vco / f_ref;
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+ k_val = f_vco % f_ref;
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+ k_val_reg = 1UL * k_val * (1 << 20) / f_ref;
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+
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+ ret = fc2580_wr_reg(priv, 0x18, r18_val | ((k_val_reg >> 16) & 0xff));
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x1a, (k_val_reg >> 8) & 0xff);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x1b, (k_val_reg >> 0) & 0xff);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x1c, n_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ if (priv->cfg->clock >= 28000000) {
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+ ret = fc2580_wr_reg(priv, 0x4b, 0x22);
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+ if (ret < 0)
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+ goto err;
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+ }
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+
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+ if (fc2580_pll_lut[i].band == 0x00) {
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+ if (c->frequency <= 794000000)
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+ tmp_val = 0x9f;
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+ else
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+ tmp_val = 0x8f;
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+
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+ ret = fc2580_wr_reg(priv, 0x2d, tmp_val);
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+ if (ret < 0)
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+ goto err;
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+ }
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+
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+ /* registers */
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+ for (i = 0; i < ARRAY_SIZE(fc2580_freq_regs_lut); i++) {
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+ if (c->frequency <= fc2580_freq_regs_lut[i].freq)
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+ break;
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+ }
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+
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+ if (i == ARRAY_SIZE(fc2580_freq_regs_lut))
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x25, fc2580_freq_regs_lut[i].r25_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x27, fc2580_freq_regs_lut[i].r27_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x28, fc2580_freq_regs_lut[i].r28_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x29, fc2580_freq_regs_lut[i].r29_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x2b, fc2580_freq_regs_lut[i].r2b_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x2c, fc2580_freq_regs_lut[i].r2c_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x2d, fc2580_freq_regs_lut[i].r2d_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x30, fc2580_freq_regs_lut[i].r30_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x44, fc2580_freq_regs_lut[i].r44_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x50, fc2580_freq_regs_lut[i].r50_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x53, fc2580_freq_regs_lut[i].r53_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x5f, fc2580_freq_regs_lut[i].r5f_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x61, fc2580_freq_regs_lut[i].r61_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x62, fc2580_freq_regs_lut[i].r62_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x63, fc2580_freq_regs_lut[i].r63_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x67, fc2580_freq_regs_lut[i].r67_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x68, fc2580_freq_regs_lut[i].r68_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x69, fc2580_freq_regs_lut[i].r69_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x6a, fc2580_freq_regs_lut[i].r6a_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x6b, fc2580_freq_regs_lut[i].r6b_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x6c, fc2580_freq_regs_lut[i].r6c_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x6d, fc2580_freq_regs_lut[i].r6d_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x6e, fc2580_freq_regs_lut[i].r6e_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x6f, fc2580_freq_regs_lut[i].r6f_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ /* IF filters */
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+ for (i = 0; i < ARRAY_SIZE(fc2580_if_filter_lut); i++) {
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+ if (c->bandwidth_hz <= fc2580_if_filter_lut[i].freq)
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+ break;
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+ }
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+
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+ if (i == ARRAY_SIZE(fc2580_if_filter_lut))
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x36, fc2580_if_filter_lut[i].r36_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x37, 1UL * priv->cfg->clock * \
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+ fc2580_if_filter_lut[i].mul / 1000000000);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x39, fc2580_if_filter_lut[i].r39_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ /* calibration? */
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+ ret = fc2580_wr_reg(priv, 0x2e, 0x09);
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+ if (ret < 0)
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+ goto err;
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+
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+ for (i = 0; i < 5; i++) {
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+ ret = fc2580_rd_reg(priv, 0x2f, &tmp_val);
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+ if (ret < 0)
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+ goto err;
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+
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+ /* done when [7:6] are set */
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+ if ((tmp_val & 0xc0) == 0xc0)
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+ break;
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+
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+ ret = fc2580_wr_reg(priv, 0x2e, 0x01);
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+ if (ret < 0)
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+ goto err;
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+
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+ ret = fc2580_wr_reg(priv, 0x2e, 0x09);
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+ if (ret < 0)
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+ goto err;
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+
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+ usleep_range(5000, 25000);
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+ }
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+
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+ dev_dbg(&priv->i2c->dev, "%s: loop=%i\n", __func__, i);
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+
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+ ret = fc2580_wr_reg(priv, 0x2e, 0x01);
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+ if (ret < 0)
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+ goto err;
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+
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+ if (fe->ops.i2c_gate_ctrl)
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+ fe->ops.i2c_gate_ctrl(fe, 0);
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+
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+ return 0;
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+err:
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+ if (fe->ops.i2c_gate_ctrl)
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+ fe->ops.i2c_gate_ctrl(fe, 0);
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+
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+ dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
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+ return ret;
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+}
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+
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+static int fc2580_init(struct dvb_frontend *fe)
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+{
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+ struct fc2580_priv *priv = fe->tuner_priv;
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+ int ret, i;
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+
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+ dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
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+
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|
|
+ if (fe->ops.i2c_gate_ctrl)
|
|
|
+ fe->ops.i2c_gate_ctrl(fe, 1);
|
|
|
+
|
|
|
+ for (i = 0; i < ARRAY_SIZE(fc2580_init_reg_vals); i++) {
|
|
|
+ ret = fc2580_wr_reg(priv, fc2580_init_reg_vals[i].reg,
|
|
|
+ fc2580_init_reg_vals[i].val);
|
|
|
+ if (ret < 0)
|
|
|
+ goto err;
|
|
|
+ }
|
|
|
+
|
|
|
+ if (fe->ops.i2c_gate_ctrl)
|
|
|
+ fe->ops.i2c_gate_ctrl(fe, 0);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+err:
|
|
|
+ if (fe->ops.i2c_gate_ctrl)
|
|
|
+ fe->ops.i2c_gate_ctrl(fe, 0);
|
|
|
+
|
|
|
+ dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static int fc2580_sleep(struct dvb_frontend *fe)
|
|
|
+{
|
|
|
+ struct fc2580_priv *priv = fe->tuner_priv;
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
|
|
|
+
|
|
|
+ if (fe->ops.i2c_gate_ctrl)
|
|
|
+ fe->ops.i2c_gate_ctrl(fe, 1);
|
|
|
+
|
|
|
+ ret = fc2580_wr_reg(priv, 0x02, 0x0a);
|
|
|
+ if (ret < 0)
|
|
|
+ goto err;
|
|
|
+
|
|
|
+ if (fe->ops.i2c_gate_ctrl)
|
|
|
+ fe->ops.i2c_gate_ctrl(fe, 0);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+err:
|
|
|
+ if (fe->ops.i2c_gate_ctrl)
|
|
|
+ fe->ops.i2c_gate_ctrl(fe, 0);
|
|
|
+
|
|
|
+ dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static int fc2580_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
|
|
|
+{
|
|
|
+ struct fc2580_priv *priv = fe->tuner_priv;
|
|
|
+
|
|
|
+ dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
|
|
|
+
|
|
|
+ *frequency = 0; /* Zero-IF */
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static int fc2580_release(struct dvb_frontend *fe)
|
|
|
+{
|
|
|
+ struct fc2580_priv *priv = fe->tuner_priv;
|
|
|
+
|
|
|
+ dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
|
|
|
+
|
|
|
+ kfree(fe->tuner_priv);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static const struct dvb_tuner_ops fc2580_tuner_ops = {
|
|
|
+ .info = {
|
|
|
+ .name = "FCI FC2580",
|
|
|
+ .frequency_min = 174000000,
|
|
|
+ .frequency_max = 862000000,
|
|
|
+ },
|
|
|
+
|
|
|
+ .release = fc2580_release,
|
|
|
+
|
|
|
+ .init = fc2580_init,
|
|
|
+ .sleep = fc2580_sleep,
|
|
|
+ .set_params = fc2580_set_params,
|
|
|
+
|
|
|
+ .get_if_frequency = fc2580_get_if_frequency,
|
|
|
+};
|
|
|
+
|
|
|
+struct dvb_frontend *fc2580_attach(struct dvb_frontend *fe,
|
|
|
+ struct i2c_adapter *i2c, const struct fc2580_config *cfg)
|
|
|
+{
|
|
|
+ struct fc2580_priv *priv;
|
|
|
+ int ret;
|
|
|
+ u8 chip_id;
|
|
|
+
|
|
|
+ if (fe->ops.i2c_gate_ctrl)
|
|
|
+ fe->ops.i2c_gate_ctrl(fe, 1);
|
|
|
+
|
|
|
+ priv = kzalloc(sizeof(struct fc2580_priv), GFP_KERNEL);
|
|
|
+ if (!priv) {
|
|
|
+ ret = -ENOMEM;
|
|
|
+ dev_err(&i2c->dev, "%s: kzalloc() failed\n", KBUILD_MODNAME);
|
|
|
+ goto err;
|
|
|
+ }
|
|
|
+
|
|
|
+ priv->cfg = cfg;
|
|
|
+ priv->i2c = i2c;
|
|
|
+ fe->tuner_priv = priv;
|
|
|
+ memcpy(&fe->ops.tuner_ops, &fc2580_tuner_ops,
|
|
|
+ sizeof(struct dvb_tuner_ops));
|
|
|
+
|
|
|
+ /* check if the tuner is there */
|
|
|
+ ret = fc2580_rd_reg(priv, 0x01, &chip_id);
|
|
|
+ if (ret < 0)
|
|
|
+ goto err;
|
|
|
+
|
|
|
+ dev_dbg(&priv->i2c->dev, "%s: chip_id=%02x\n", __func__, chip_id);
|
|
|
+
|
|
|
+ if (chip_id != 0x56)
|
|
|
+ goto err;
|
|
|
+
|
|
|
+ dev_info(&priv->i2c->dev,
|
|
|
+ "%s: FCI FC2580 successfully identified\n",
|
|
|
+ KBUILD_MODNAME);
|
|
|
+
|
|
|
+ if (fe->ops.i2c_gate_ctrl)
|
|
|
+ fe->ops.i2c_gate_ctrl(fe, 0);
|
|
|
+
|
|
|
+ return fe;
|
|
|
+err:
|
|
|
+ if (fe->ops.i2c_gate_ctrl)
|
|
|
+ fe->ops.i2c_gate_ctrl(fe, 0);
|
|
|
+
|
|
|
+ dev_dbg(&i2c->dev, "%s: failed=%d\n", __func__, ret);
|
|
|
+ kfree(priv);
|
|
|
+ return NULL;
|
|
|
+}
|
|
|
+EXPORT_SYMBOL(fc2580_attach);
|
|
|
+
|
|
|
+MODULE_DESCRIPTION("FCI FC2580 silicon tuner driver");
|
|
|
+MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
|
|
|
+MODULE_LICENSE("GPL");
|