|
@@ -17,6 +17,7 @@
|
|
|
#define __ASM_CPUTYPE_H
|
|
|
|
|
|
#define ID_MIDR_EL1 "midr_el1"
|
|
|
+#define ID_MPIDR_EL1 "mpidr_el1"
|
|
|
#define ID_CTR_EL0 "ctr_el0"
|
|
|
|
|
|
#define ID_AA64PFR0_EL1 "id_aa64pfr0_el1"
|
|
@@ -31,6 +32,12 @@
|
|
|
__val; \
|
|
|
})
|
|
|
|
|
|
+#define ARM_CPU_IMP_ARM 0x41
|
|
|
+
|
|
|
+#define ARM_CPU_PART_AEM_V8 0xD0F0
|
|
|
+#define ARM_CPU_PART_FOUNDATION 0xD000
|
|
|
+#define ARM_CPU_PART_CORTEX_A57 0xD070
|
|
|
+
|
|
|
/*
|
|
|
* The CPU ID never changes at run time, so we might as well tell the
|
|
|
* compiler that it's constant. Use this function to read the CPU ID
|
|
@@ -41,6 +48,21 @@ static inline u32 __attribute_const__ read_cpuid_id(void)
|
|
|
return read_cpuid(ID_MIDR_EL1);
|
|
|
}
|
|
|
|
|
|
+static inline u64 __attribute_const__ read_cpuid_mpidr(void)
|
|
|
+{
|
|
|
+ return read_cpuid(ID_MPIDR_EL1);
|
|
|
+}
|
|
|
+
|
|
|
+static inline unsigned int __attribute_const__ read_cpuid_implementor(void)
|
|
|
+{
|
|
|
+ return (read_cpuid_id() & 0xFF000000) >> 24;
|
|
|
+}
|
|
|
+
|
|
|
+static inline unsigned int __attribute_const__ read_cpuid_part_number(void)
|
|
|
+{
|
|
|
+ return (read_cpuid_id() & 0xFFF0);
|
|
|
+}
|
|
|
+
|
|
|
static inline u32 __attribute_const__ read_cpuid_cachetype(void)
|
|
|
{
|
|
|
return read_cpuid(ID_CTR_EL0);
|