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@@ -113,6 +113,17 @@ enum dss_dsi_content_type {
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DSS_DSI_CONTENT_GENERIC,
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};
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+enum dss_writeback_channel {
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+ DSS_WB_LCD1_MGR = 0,
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+ DSS_WB_LCD2_MGR = 1,
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+ DSS_WB_TV_MGR = 2,
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+ DSS_WB_OVL0 = 3,
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+ DSS_WB_OVL1 = 4,
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+ DSS_WB_OVL2 = 5,
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+ DSS_WB_OVL3 = 6,
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+ DSS_WB_LCD3_MGR = 7,
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+};
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+
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struct dss_clock_info {
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/* rates that we get with dividers below */
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unsigned long fck;
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@@ -475,6 +486,8 @@ int dispc_mgr_get_clock_div(enum omap_channel channel,
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void dispc_mgr_setup(enum omap_channel channel,
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struct omap_overlay_manager_info *info);
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+void dispc_wb_set_channel_in(enum dss_writeback_channel channel);
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+
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/* VENC */
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#ifdef CONFIG_OMAP2_DSS_VENC
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int venc_init_platform_driver(void) __init;
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