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@@ -30,12 +30,60 @@
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#define TPM_MAX_TRIES 5000
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#define TPM_INFINEON_DEV_VEN_VALUE 0x15D1
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-/* These values will be filled after PnP-call */
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-static int TPM_INF_DATA;
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-static int TPM_INF_ADDR;
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-static int TPM_INF_BASE;
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-static int TPM_INF_ADDR_LEN;
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-static int TPM_INF_PORT_LEN;
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+#define TPM_INF_IO_PORT 0x0
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+#define TPM_INF_IO_MEM 0x1
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+
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+#define TPM_INF_ADDR 0x0
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+#define TPM_INF_DATA 0x1
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+
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+struct tpm_inf_dev {
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+ int iotype;
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+
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+ void __iomem *mem_base; /* MMIO ioremap'd addr */
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+ unsigned long map_base; /* phys MMIO base */
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+ unsigned long map_size; /* MMIO region size */
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+ unsigned int index_off; /* index register offset */
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+
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+ unsigned int data_regs; /* Data registers */
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+ unsigned int data_size;
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+
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+ unsigned int config_port; /* IO Port config index reg */
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+ unsigned int config_size;
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+};
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+
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+static struct tpm_inf_dev tpm_dev;
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+
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+static inline void tpm_data_out(unsigned char data, unsigned char offset)
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+{
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+ if (tpm_dev.iotype == TPM_INF_IO_PORT)
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+ outb(data, tpm_dev.data_regs + offset);
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+ else
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+ writeb(data, tpm_dev.mem_base + tpm_dev.data_regs + offset);
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+}
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+
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+static inline unsigned char tpm_data_in(unsigned char offset)
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+{
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+ if (tpm_dev.iotype == TPM_INF_IO_PORT)
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+ return inb(tpm_dev.data_regs + offset);
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+ else
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+ return readb(tpm_dev.mem_base + tpm_dev.data_regs + offset);
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+}
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+
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+static inline void tpm_config_out(unsigned char data, unsigned char offset)
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+{
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+ if (tpm_dev.iotype == TPM_INF_IO_PORT)
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+ outb(data, tpm_dev.config_port + offset);
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+ else
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+ writeb(data, tpm_dev.mem_base + tpm_dev.index_off + offset);
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+}
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+
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+static inline unsigned char tpm_config_in(unsigned char offset)
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+{
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+ if (tpm_dev.iotype == TPM_INF_IO_PORT)
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+ return inb(tpm_dev.config_port + offset);
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+ else
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+ return readb(tpm_dev.mem_base + tpm_dev.index_off + offset);
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+}
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/* TPM header definitions */
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enum infineon_tpm_header {
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@@ -105,7 +153,7 @@ static int empty_fifo(struct tpm_chip *chip, int clear_wrfifo)
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if (clear_wrfifo) {
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for (i = 0; i < 4096; i++) {
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- status = inb(chip->vendor.base + WRFIFO);
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+ status = tpm_data_in(WRFIFO);
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if (status == 0xff) {
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if (check == 5)
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break;
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@@ -125,8 +173,8 @@ static int empty_fifo(struct tpm_chip *chip, int clear_wrfifo)
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*/
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i = 0;
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do {
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- status = inb(chip->vendor.base + RDFIFO);
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- status = inb(chip->vendor.base + STAT);
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+ status = tpm_data_in(RDFIFO);
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+ status = tpm_data_in(STAT);
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i++;
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if (i == TPM_MAX_TRIES)
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return -EIO;
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@@ -139,7 +187,7 @@ static int wait(struct tpm_chip *chip, int wait_for_bit)
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int status;
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int i;
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for (i = 0; i < TPM_MAX_TRIES; i++) {
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- status = inb(chip->vendor.base + STAT);
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+ status = tpm_data_in(STAT);
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/* check the status-register if wait_for_bit is set */
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if (status & 1 << wait_for_bit)
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break;
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@@ -158,7 +206,7 @@ static int wait(struct tpm_chip *chip, int wait_for_bit)
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static void wait_and_send(struct tpm_chip *chip, u8 sendbyte)
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{
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wait(chip, STAT_XFE);
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- outb(sendbyte, chip->vendor.base + WRFIFO);
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+ tpm_data_out(sendbyte, WRFIFO);
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}
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/* Note: WTX means Waiting-Time-Extension. Whenever the TPM needs more
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@@ -205,7 +253,7 @@ recv_begin:
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ret = wait(chip, STAT_RDA);
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if (ret)
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return -EIO;
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- buf[i] = inb(chip->vendor.base + RDFIFO);
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+ buf[i] = tpm_data_in(RDFIFO);
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}
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if (buf[0] != TPM_VL_VER) {
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@@ -220,7 +268,7 @@ recv_begin:
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for (i = 0; i < size; i++) {
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wait(chip, STAT_RDA);
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- buf[i] = inb(chip->vendor.base + RDFIFO);
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+ buf[i] = tpm_data_in(RDFIFO);
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}
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if ((size == 0x6D00) && (buf[1] == 0x80)) {
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@@ -269,7 +317,7 @@ static int tpm_inf_send(struct tpm_chip *chip, u8 * buf, size_t count)
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u8 count_high, count_low, count_4, count_3, count_2, count_1;
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/* Disabling Reset, LP and IRQC */
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- outb(RESET_LP_IRQC_DISABLE, chip->vendor.base + CMD);
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+ tpm_data_out(RESET_LP_IRQC_DISABLE, CMD);
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ret = empty_fifo(chip, 1);
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if (ret) {
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@@ -320,7 +368,7 @@ static void tpm_inf_cancel(struct tpm_chip *chip)
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static u8 tpm_inf_status(struct tpm_chip *chip)
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{
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- return inb(chip->vendor.base + STAT);
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+ return tpm_data_in(STAT);
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}
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static DEVICE_ATTR(pubek, S_IRUGO, tpm_show_pubek, NULL);
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@@ -381,51 +429,88 @@ static int __devinit tpm_inf_pnp_probe(struct pnp_dev *dev,
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/* read IO-ports through PnP */
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if (pnp_port_valid(dev, 0) && pnp_port_valid(dev, 1) &&
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!(pnp_port_flags(dev, 0) & IORESOURCE_DISABLED)) {
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- TPM_INF_ADDR = pnp_port_start(dev, 0);
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- TPM_INF_ADDR_LEN = pnp_port_len(dev, 0);
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- TPM_INF_DATA = (TPM_INF_ADDR + 1);
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- TPM_INF_BASE = pnp_port_start(dev, 1);
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- TPM_INF_PORT_LEN = pnp_port_len(dev, 1);
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- if ((TPM_INF_PORT_LEN < 4) || (TPM_INF_ADDR_LEN < 2)) {
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+
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+ tpm_dev.iotype = TPM_INF_IO_PORT;
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+
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+ tpm_dev.config_port = pnp_port_start(dev, 0);
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+ tpm_dev.config_size = pnp_port_len(dev, 0);
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+ tpm_dev.data_regs = pnp_port_start(dev, 1);
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+ tpm_dev.data_size = pnp_port_len(dev, 1);
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+ if ((tpm_dev.data_size < 4) || (tpm_dev.config_size < 2)) {
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rc = -EINVAL;
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goto err_last;
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}
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dev_info(&dev->dev, "Found %s with ID %s\n",
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dev->name, dev_id->id);
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- if (!((TPM_INF_BASE >> 8) & 0xff)) {
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+ if (!((tpm_dev.data_regs >> 8) & 0xff)) {
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rc = -EINVAL;
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goto err_last;
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}
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/* publish my base address and request region */
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- if (request_region
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- (TPM_INF_BASE, TPM_INF_PORT_LEN, "tpm_infineon0") == NULL) {
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+ if (request_region(tpm_dev.data_regs, tpm_dev.data_size,
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+ "tpm_infineon0") == NULL) {
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rc = -EINVAL;
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goto err_last;
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}
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- if (request_region
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- (TPM_INF_ADDR, TPM_INF_ADDR_LEN, "tpm_infineon0") == NULL) {
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+ if (request_region(tpm_dev.config_port, tpm_dev.config_size,
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+ "tpm_infineon0") == NULL) {
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+ release_region(tpm_dev.data_regs, tpm_dev.data_size);
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rc = -EINVAL;
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goto err_last;
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}
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+ } else if (pnp_mem_valid(dev, 0) &&
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+ !(pnp_mem_flags(dev, 0) & IORESOURCE_DISABLED)) {
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+
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+ tpm_dev.iotype = TPM_INF_IO_MEM;
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+
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+ tpm_dev.map_base = pnp_mem_start(dev, 0);
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+ tpm_dev.map_size = pnp_mem_len(dev, 0);
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+
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+ dev_info(&dev->dev, "Found %s with ID %s\n",
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+ dev->name, dev_id->id);
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+
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+ /* publish my base address and request region */
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+ if (request_mem_region(tpm_dev.map_base, tpm_dev.map_size,
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+ "tpm_infineon0") == NULL) {
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+ rc = -EINVAL;
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+ goto err_last;
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+ }
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+
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+ tpm_dev.mem_base = ioremap(tpm_dev.map_base, tpm_dev.map_size);
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+ if (tpm_dev.mem_base == NULL) {
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+ release_mem_region(tpm_dev.map_base, tpm_dev.map_size);
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+ rc = -EINVAL;
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+ goto err_last;
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+ }
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+
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+ /*
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+ * The only known MMIO based Infineon TPM system provides
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+ * a single large mem region with the device config
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+ * registers at the default TPM_ADDR. The data registers
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+ * seem like they could be placed anywhere within the MMIO
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+ * region, but lets just put them at zero offset.
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+ */
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+ tpm_dev.index_off = TPM_ADDR;
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+ tpm_dev.data_regs = 0x0;
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} else {
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rc = -EINVAL;
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goto err_last;
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}
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/* query chip for its vendor, its version number a.s.o. */
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- outb(ENABLE_REGISTER_PAIR, TPM_INF_ADDR);
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- outb(IDVENL, TPM_INF_ADDR);
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- vendorid[1] = inb(TPM_INF_DATA);
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- outb(IDVENH, TPM_INF_ADDR);
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- vendorid[0] = inb(TPM_INF_DATA);
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- outb(IDPDL, TPM_INF_ADDR);
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- productid[1] = inb(TPM_INF_DATA);
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- outb(IDPDH, TPM_INF_ADDR);
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- productid[0] = inb(TPM_INF_DATA);
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- outb(CHIP_ID1, TPM_INF_ADDR);
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- version[1] = inb(TPM_INF_DATA);
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- outb(CHIP_ID2, TPM_INF_ADDR);
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- version[0] = inb(TPM_INF_DATA);
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+ tpm_config_out(ENABLE_REGISTER_PAIR, TPM_INF_ADDR);
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+ tpm_config_out(IDVENL, TPM_INF_ADDR);
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+ vendorid[1] = tpm_config_in(TPM_INF_DATA);
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+ tpm_config_out(IDVENH, TPM_INF_ADDR);
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+ vendorid[0] = tpm_config_in(TPM_INF_DATA);
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+ tpm_config_out(IDPDL, TPM_INF_ADDR);
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+ productid[1] = tpm_config_in(TPM_INF_DATA);
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+ tpm_config_out(IDPDH, TPM_INF_ADDR);
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+ productid[0] = tpm_config_in(TPM_INF_DATA);
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+ tpm_config_out(CHIP_ID1, TPM_INF_ADDR);
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+ version[1] = tpm_config_in(TPM_INF_DATA);
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+ tpm_config_out(CHIP_ID2, TPM_INF_ADDR);
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+ version[0] = tpm_config_in(TPM_INF_DATA);
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switch ((productid[0] << 8) | productid[1]) {
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case 6:
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@@ -442,51 +527,54 @@ static int __devinit tpm_inf_pnp_probe(struct pnp_dev *dev,
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if ((vendorid[0] << 8 | vendorid[1]) == (TPM_INFINEON_DEV_VEN_VALUE)) {
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/* configure TPM with IO-ports */
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- outb(IOLIMH, TPM_INF_ADDR);
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- outb(((TPM_INF_BASE >> 8) & 0xff), TPM_INF_DATA);
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- outb(IOLIML, TPM_INF_ADDR);
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- outb((TPM_INF_BASE & 0xff), TPM_INF_DATA);
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+ tpm_config_out(IOLIMH, TPM_INF_ADDR);
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+ tpm_config_out((tpm_dev.data_regs >> 8) & 0xff, TPM_INF_DATA);
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+ tpm_config_out(IOLIML, TPM_INF_ADDR);
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+ tpm_config_out((tpm_dev.data_regs & 0xff), TPM_INF_DATA);
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/* control if IO-ports are set correctly */
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- outb(IOLIMH, TPM_INF_ADDR);
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- ioh = inb(TPM_INF_DATA);
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- outb(IOLIML, TPM_INF_ADDR);
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- iol = inb(TPM_INF_DATA);
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+ tpm_config_out(IOLIMH, TPM_INF_ADDR);
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+ ioh = tpm_config_in(TPM_INF_DATA);
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+ tpm_config_out(IOLIML, TPM_INF_ADDR);
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+ iol = tpm_config_in(TPM_INF_DATA);
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- if ((ioh << 8 | iol) != TPM_INF_BASE) {
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+ if ((ioh << 8 | iol) != tpm_dev.data_regs) {
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dev_err(&dev->dev,
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- "Could not set IO-ports to 0x%x\n",
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- TPM_INF_BASE);
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+ "Could not set IO-data registers to 0x%x\n",
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+ tpm_dev.data_regs);
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rc = -EIO;
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goto err_release_region;
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}
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/* activate register */
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- outb(TPM_DAR, TPM_INF_ADDR);
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- outb(0x01, TPM_INF_DATA);
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- outb(DISABLE_REGISTER_PAIR, TPM_INF_ADDR);
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+ tpm_config_out(TPM_DAR, TPM_INF_ADDR);
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+ tpm_config_out(0x01, TPM_INF_DATA);
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+ tpm_config_out(DISABLE_REGISTER_PAIR, TPM_INF_ADDR);
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/* disable RESET, LP and IRQC */
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- outb(RESET_LP_IRQC_DISABLE, TPM_INF_BASE + CMD);
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+ tpm_data_out(RESET_LP_IRQC_DISABLE, CMD);
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/* Finally, we're done, print some infos */
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dev_info(&dev->dev, "TPM found: "
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- "config base 0x%x, "
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- "io base 0x%x, "
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+ "config base 0x%lx, "
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+ "data base 0x%lx, "
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"chip version 0x%02x%02x, "
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"vendor id 0x%x%x (Infineon), "
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"product id 0x%02x%02x"
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"%s\n",
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- TPM_INF_ADDR,
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- TPM_INF_BASE,
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+ tpm_dev.iotype == TPM_INF_IO_PORT ?
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+ tpm_dev.config_port :
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+ tpm_dev.map_base + tpm_dev.index_off,
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+ tpm_dev.iotype == TPM_INF_IO_PORT ?
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+ tpm_dev.data_regs :
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+ tpm_dev.map_base + tpm_dev.data_regs,
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version[0], version[1],
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vendorid[0], vendorid[1],
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productid[0], productid[1], chipname);
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- if (!(chip = tpm_register_hardware(&dev->dev, &tpm_inf))) {
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+ if (!(chip = tpm_register_hardware(&dev->dev, &tpm_inf)))
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goto err_release_region;
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- }
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- chip->vendor.base = TPM_INF_BASE;
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+
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return 0;
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} else {
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rc = -ENODEV;
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@@ -494,8 +582,13 @@ static int __devinit tpm_inf_pnp_probe(struct pnp_dev *dev,
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}
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err_release_region:
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- release_region(TPM_INF_BASE, TPM_INF_PORT_LEN);
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- release_region(TPM_INF_ADDR, TPM_INF_ADDR_LEN);
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+ if (tpm_dev.iotype == TPM_INF_IO_PORT) {
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+ release_region(tpm_dev.data_regs, tpm_dev.data_size);
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+ release_region(tpm_dev.config_port, tpm_dev.config_size);
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+ } else {
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+ iounmap(tpm_dev.mem_base);
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+ release_mem_region(tpm_dev.map_base, tpm_dev.map_size);
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+ }
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err_last:
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return rc;
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@@ -506,8 +599,14 @@ static __devexit void tpm_inf_pnp_remove(struct pnp_dev *dev)
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struct tpm_chip *chip = pnp_get_drvdata(dev);
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if (chip) {
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- release_region(TPM_INF_BASE, TPM_INF_PORT_LEN);
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- release_region(TPM_INF_ADDR, TPM_INF_ADDR_LEN);
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+ if (tpm_dev.iotype == TPM_INF_IO_PORT) {
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+ release_region(tpm_dev.data_regs, tpm_dev.data_size);
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+ release_region(tpm_dev.config_port,
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+ tpm_dev.config_size);
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+ } else {
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+ iounmap(tpm_dev.mem_base);
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+ release_mem_region(tpm_dev.map_base, tpm_dev.map_size);
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|
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+ }
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tpm_remove_hardware(chip->dev);
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|
|
}
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|
|
}
|
|
@@ -539,5 +638,5 @@ module_exit(cleanup_inf);
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MODULE_AUTHOR("Marcel Selhorst <selhorst@crypto.rub.de>");
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MODULE_DESCRIPTION("Driver for Infineon TPM SLD 9630 TT 1.1 / SLB 9635 TT 1.2");
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-MODULE_VERSION("1.8");
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+MODULE_VERSION("1.9");
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|
MODULE_LICENSE("GPL");
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