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@@ -3097,7 +3097,7 @@ static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc)
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if (HAS_PCH_IBX(dev_priv->dev)) {
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/* Ironlake PCH has a fixed PLL->PCH pipe mapping. */
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- i = crtc->pipe;
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+ i = (enum intel_dpll_id) crtc->pipe;
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pll = &dev_priv->shared_dplls[i];
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DRM_DEBUG_KMS("CRTC:%d using pre-allocated %s\n",
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@@ -5856,7 +5856,8 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
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ironlake_get_fdi_m_n_config(crtc, pipe_config);
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if (HAS_PCH_IBX(dev_priv->dev)) {
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- pipe_config->shared_dpll = crtc->pipe;
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+ pipe_config->shared_dpll =
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+ (enum intel_dpll_id) crtc->pipe;
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} else {
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tmp = I915_READ(PCH_DPLL_SEL);
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if (tmp & TRANS_DPLLB_SEL(crtc->pipe))
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