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@@ -783,46 +783,6 @@ static int __init init_iommu_all(struct acpi_table_header *table)
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*
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****************************************************************************/
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-static int __init iommu_setup_msix(struct amd_iommu *iommu)
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-{
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- struct amd_iommu *curr;
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- struct msix_entry entries[32]; /* only 32 supported by AMD IOMMU */
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- int nvec = 0, i;
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-
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- for_each_iommu(curr) {
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- if (curr->dev == iommu->dev) {
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- entries[nvec].entry = curr->evt_msi_num;
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- entries[nvec].vector = 0;
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- curr->int_enabled = true;
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- nvec++;
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- }
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- }
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-
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- if (pci_enable_msix(iommu->dev, entries, nvec)) {
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- pci_disable_msix(iommu->dev);
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- return 1;
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- }
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-
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- for (i = 0; i < nvec; ++i) {
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- int r = request_irq(entries->vector, amd_iommu_int_handler,
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- IRQF_SAMPLE_RANDOM,
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- "AMD IOMMU",
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- NULL);
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- if (r)
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- goto out_free;
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- }
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-
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- return 0;
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-
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-out_free:
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- for (i -= 1; i >= 0; --i)
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- free_irq(entries->vector, NULL);
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-
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- pci_disable_msix(iommu->dev);
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-
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- return 1;
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-}
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-
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static int __init iommu_setup_msi(struct amd_iommu *iommu)
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{
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int r;
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@@ -851,9 +811,7 @@ static int __init iommu_init_msi(struct amd_iommu *iommu)
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if (iommu->int_enabled)
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return 0;
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- if (pci_find_capability(iommu->dev, PCI_CAP_ID_MSIX))
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- return iommu_setup_msix(iommu);
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- else if (pci_find_capability(iommu->dev, PCI_CAP_ID_MSI))
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+ if (pci_find_capability(iommu->dev, PCI_CAP_ID_MSI))
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return iommu_setup_msi(iommu);
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return 1;
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