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@@ -40,7 +40,11 @@
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#ifndef PCI_DEVICE_ID_QLOGIC_ISP4022
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#define PCI_DEVICE_ID_QLOGIC_ISP4022 0x4022
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-#endif /* */
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+#endif
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+
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+#ifndef PCI_DEVICE_ID_QLOGIC_ISP4032
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+#define PCI_DEVICE_ID_QLOGIC_ISP4032 0x4032
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+#endif
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#define QLA_SUCCESS 0
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#define QLA_ERROR 1
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@@ -277,7 +281,6 @@ struct scsi_qla_host {
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#define AF_INTERRUPTS_ON 6 /* 0x00000040 Not Used */
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#define AF_GET_CRASH_RECORD 7 /* 0x00000080 */
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#define AF_LINK_UP 8 /* 0x00000100 */
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-#define AF_TOPCAT_CHIP_PRESENT 9 /* 0x00000200 */
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#define AF_IRQ_ATTACHED 10 /* 0x00000400 */
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#define AF_ISNS_CMD_IN_PROCESS 12 /* 0x00001000 */
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#define AF_ISNS_CMD_DONE 13 /* 0x00002000 */
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@@ -317,16 +320,17 @@ struct scsi_qla_host {
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/* NVRAM registers */
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struct eeprom_data *nvram;
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spinlock_t hardware_lock ____cacheline_aligned;
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- spinlock_t list_lock;
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uint32_t eeprom_cmd_data;
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/* Counters for general statistics */
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+ uint64_t isr_count;
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uint64_t adapter_error_count;
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uint64_t device_error_count;
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uint64_t total_io_count;
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uint64_t total_mbytes_xferred;
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uint64_t link_failure_count;
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uint64_t invalid_crc_count;
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+ uint32_t bytes_xfered;
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uint32_t spurious_int_count;
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uint32_t aborted_io_count;
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uint32_t io_timeout_count;
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@@ -438,6 +442,11 @@ static inline int is_qla4022(struct scsi_qla_host *ha)
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return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP4022;
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}
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+static inline int is_qla4032(struct scsi_qla_host *ha)
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+{
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+ return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP4032;
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+}
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+
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static inline int adapter_up(struct scsi_qla_host *ha)
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{
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return (test_bit(AF_ONLINE, &ha->flags) != 0) &&
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@@ -451,58 +460,58 @@ static inline struct scsi_qla_host* to_qla_host(struct Scsi_Host *shost)
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static inline void __iomem* isp_semaphore(struct scsi_qla_host *ha)
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{
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- return (is_qla4022(ha) ?
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- &ha->reg->u1.isp4022.semaphore :
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- &ha->reg->u1.isp4010.nvram);
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+ return (is_qla4010(ha) ?
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+ &ha->reg->u1.isp4010.nvram :
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+ &ha->reg->u1.isp4022.semaphore);
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}
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static inline void __iomem* isp_nvram(struct scsi_qla_host *ha)
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{
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- return (is_qla4022(ha) ?
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- &ha->reg->u1.isp4022.nvram :
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- &ha->reg->u1.isp4010.nvram);
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+ return (is_qla4010(ha) ?
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+ &ha->reg->u1.isp4010.nvram :
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+ &ha->reg->u1.isp4022.nvram);
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}
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static inline void __iomem* isp_ext_hw_conf(struct scsi_qla_host *ha)
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{
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- return (is_qla4022(ha) ?
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- &ha->reg->u2.isp4022.p0.ext_hw_conf :
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- &ha->reg->u2.isp4010.ext_hw_conf);
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+ return (is_qla4010(ha) ?
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+ &ha->reg->u2.isp4010.ext_hw_conf :
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+ &ha->reg->u2.isp4022.p0.ext_hw_conf);
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}
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static inline void __iomem* isp_port_status(struct scsi_qla_host *ha)
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{
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- return (is_qla4022(ha) ?
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- &ha->reg->u2.isp4022.p0.port_status :
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- &ha->reg->u2.isp4010.port_status);
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+ return (is_qla4010(ha) ?
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+ &ha->reg->u2.isp4010.port_status :
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+ &ha->reg->u2.isp4022.p0.port_status);
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}
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static inline void __iomem* isp_port_ctrl(struct scsi_qla_host *ha)
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{
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- return (is_qla4022(ha) ?
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- &ha->reg->u2.isp4022.p0.port_ctrl :
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- &ha->reg->u2.isp4010.port_ctrl);
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+ return (is_qla4010(ha) ?
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+ &ha->reg->u2.isp4010.port_ctrl :
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+ &ha->reg->u2.isp4022.p0.port_ctrl);
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}
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static inline void __iomem* isp_port_error_status(struct scsi_qla_host *ha)
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{
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- return (is_qla4022(ha) ?
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- &ha->reg->u2.isp4022.p0.port_err_status :
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- &ha->reg->u2.isp4010.port_err_status);
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+ return (is_qla4010(ha) ?
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+ &ha->reg->u2.isp4010.port_err_status :
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+ &ha->reg->u2.isp4022.p0.port_err_status);
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}
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static inline void __iomem * isp_gp_out(struct scsi_qla_host *ha)
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{
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- return (is_qla4022(ha) ?
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- &ha->reg->u2.isp4022.p0.gp_out :
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- &ha->reg->u2.isp4010.gp_out);
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+ return (is_qla4010(ha) ?
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+ &ha->reg->u2.isp4010.gp_out :
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+ &ha->reg->u2.isp4022.p0.gp_out);
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}
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static inline int eeprom_ext_hw_conf_offset(struct scsi_qla_host *ha)
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{
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- return (is_qla4022(ha) ?
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- offsetof(struct eeprom_data, isp4022.ext_hw_conf) / 2 :
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- offsetof(struct eeprom_data, isp4010.ext_hw_conf) / 2);
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+ return (is_qla4010(ha) ?
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+ offsetof(struct eeprom_data, isp4010.ext_hw_conf) / 2 :
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+ offsetof(struct eeprom_data, isp4022.ext_hw_conf) / 2);
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}
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int ql4xxx_sem_spinlock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits);
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@@ -511,59 +520,59 @@ int ql4xxx_sem_lock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits);
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static inline int ql4xxx_lock_flash(struct scsi_qla_host *a)
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{
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- if (is_qla4022(a))
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+ if (is_qla4010(a))
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+ return ql4xxx_sem_spinlock(a, QL4010_FLASH_SEM_MASK,
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+ QL4010_FLASH_SEM_BITS);
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+ else
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return ql4xxx_sem_spinlock(a, QL4022_FLASH_SEM_MASK,
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(QL4022_RESOURCE_BITS_BASE_CODE |
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(a->mac_index)) << 13);
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- else
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- return ql4xxx_sem_spinlock(a, QL4010_FLASH_SEM_MASK,
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- QL4010_FLASH_SEM_BITS);
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}
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static inline void ql4xxx_unlock_flash(struct scsi_qla_host *a)
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{
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- if (is_qla4022(a))
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- ql4xxx_sem_unlock(a, QL4022_FLASH_SEM_MASK);
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- else
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+ if (is_qla4010(a))
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ql4xxx_sem_unlock(a, QL4010_FLASH_SEM_MASK);
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+ else
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+ ql4xxx_sem_unlock(a, QL4022_FLASH_SEM_MASK);
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}
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static inline int ql4xxx_lock_nvram(struct scsi_qla_host *a)
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{
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- if (is_qla4022(a))
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+ if (is_qla4010(a))
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+ return ql4xxx_sem_spinlock(a, QL4010_NVRAM_SEM_MASK,
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+ QL4010_NVRAM_SEM_BITS);
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+ else
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return ql4xxx_sem_spinlock(a, QL4022_NVRAM_SEM_MASK,
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(QL4022_RESOURCE_BITS_BASE_CODE |
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(a->mac_index)) << 10);
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- else
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- return ql4xxx_sem_spinlock(a, QL4010_NVRAM_SEM_MASK,
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- QL4010_NVRAM_SEM_BITS);
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}
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static inline void ql4xxx_unlock_nvram(struct scsi_qla_host *a)
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{
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- if (is_qla4022(a))
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- ql4xxx_sem_unlock(a, QL4022_NVRAM_SEM_MASK);
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- else
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+ if (is_qla4010(a))
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ql4xxx_sem_unlock(a, QL4010_NVRAM_SEM_MASK);
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+ else
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+ ql4xxx_sem_unlock(a, QL4022_NVRAM_SEM_MASK);
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}
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static inline int ql4xxx_lock_drvr(struct scsi_qla_host *a)
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{
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- if (is_qla4022(a))
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+ if (is_qla4010(a))
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+ return ql4xxx_sem_lock(a, QL4010_DRVR_SEM_MASK,
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+ QL4010_DRVR_SEM_BITS);
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+ else
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return ql4xxx_sem_lock(a, QL4022_DRVR_SEM_MASK,
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(QL4022_RESOURCE_BITS_BASE_CODE |
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(a->mac_index)) << 1);
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- else
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- return ql4xxx_sem_lock(a, QL4010_DRVR_SEM_MASK,
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- QL4010_DRVR_SEM_BITS);
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}
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static inline void ql4xxx_unlock_drvr(struct scsi_qla_host *a)
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{
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- if (is_qla4022(a))
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- ql4xxx_sem_unlock(a, QL4022_DRVR_SEM_MASK);
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- else
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+ if (is_qla4010(a))
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ql4xxx_sem_unlock(a, QL4010_DRVR_SEM_MASK);
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+ else
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+ ql4xxx_sem_unlock(a, QL4022_DRVR_SEM_MASK);
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}
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/*---------------------------------------------------------------------------*/
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