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@@ -25,6 +25,8 @@
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#define ARCH_ID_AT91SAM9G20 0x019905a0
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#define ARCH_ID_AT91SAM9RL64 0x019b03a0
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#define ARCH_ID_AT91SAM9G45 0x819b05a0
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+#define ARCH_ID_AT91SAM9G45MRL 0x819b05a2 /* aka 9G45-ES2 & non ES lots */
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+#define ARCH_ID_AT91SAM9G45ES 0x819b05a1 /* 9G45-ES (Engineering Sample) */
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#define ARCH_ID_AT91CAP9 0x039A03A0
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#define ARCH_ID_AT91SAM9XE128 0x329973a0
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@@ -41,6 +43,11 @@ static inline unsigned long at91_cpu_identify(void)
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return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION);
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}
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+static inline unsigned long at91_cpu_fully_identify(void)
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+{
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+ return at91_sys_read(AT91_DBGU_CIDR);
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+}
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+
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#define ARCH_EXID_AT91SAM9M11 0x00000001
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#define ARCH_EXID_AT91SAM9M10 0x00000002
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#define ARCH_EXID_AT91SAM9G45 0x00000004
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@@ -118,8 +125,10 @@ static inline unsigned long at91cap9_rev_identify(void)
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#ifdef CONFIG_ARCH_AT91SAM9G45
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#define cpu_is_at91sam9g45() (at91_cpu_identify() == ARCH_ID_AT91SAM9G45)
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+#define cpu_is_at91sam9g45es() (at91_cpu_fully_identify() == ARCH_ID_AT91SAM9G45ES)
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#else
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#define cpu_is_at91sam9g45() (0)
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+#define cpu_is_at91sam9g45es() (0)
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#endif
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#ifdef CONFIG_ARCH_AT91CAP9
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