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@@ -47,6 +47,72 @@
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reg = <0x00000000 0x20000000>; // 512MB at 0
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};
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+ localbus@e0005000 {
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+ #address-cells = <2>;
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+ #size-cells = <1>;
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+ compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
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+ reg = <0xe0005000 0x1000>;
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+ interrupts = <77 0x8>;
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+ interrupt-parent = <&ipic>;
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+
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+ // booting from NOR flash
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+ ranges = <0 0x0 0xfe000000 0x02000000
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+ 1 0x0 0xf8000000 0x00008000
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+ 3 0x0 0xe0600000 0x00008000>;
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+
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+ flash@0,0 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "cfi-flash";
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+ reg = <0 0x0 0x2000000>;
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+ bank-width = <2>;
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+ device-width = <1>;
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+
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+ u-boot@0 {
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+ reg = <0x0 0x100000>;
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+ read-only;
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+ };
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+
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+ fs@100000 {
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+ reg = <0x100000 0x800000>;
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+ };
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+
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+ kernel@1d00000 {
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+ reg = <0x1d00000 0x200000>;
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+ };
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+
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+ dtb@1f00000 {
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+ reg = <0x1f00000 0x100000>;
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+ };
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+ };
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+
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+ bcsr@1,0 {
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+ reg = <1 0x0 0x8000>;
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+ compatible = "fsl,mpc837xmds-bcsr";
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+ };
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+
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+ nand@3,0 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "fsl,mpc8377-fcm-nand",
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+ "fsl,elbc-fcm-nand";
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+ reg = <3 0x0 0x8000>;
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+
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+ u-boot@0 {
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+ reg = <0x0 0x100000>;
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+ read-only;
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+ };
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+
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+ kernel@100000 {
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+ reg = <0x100000 0x300000>;
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+ };
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+
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+ fs@400000 {
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+ reg = <0x400000 0x1c00000>;
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+ };
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+ };
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+ };
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+
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soc@e0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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