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@@ -17,9 +17,11 @@
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* MA 02110-1301, USA.
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*/
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+#include <linux/module.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <mach/common.h>
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+#include <asm/mach/irq.h>
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#define AVIC_BASE IO_ADDRESS(AVIC_BASE_ADDR)
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#define AVIC_INTCNTL (AVIC_BASE + 0x00) /* int control reg */
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@@ -65,6 +67,28 @@ void imx_irq_set_priority(unsigned char irq, unsigned char prio)
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EXPORT_SYMBOL(imx_irq_set_priority);
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#endif
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+#ifdef CONFIG_FIQ
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+int mxc_set_irq_fiq(unsigned int irq, unsigned int type)
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+{
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+ unsigned int irqt;
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+
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+ if (irq >= MXC_MAX_INT_LINES)
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+ return -EINVAL;
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+
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+ if (irq < MXC_MAX_INT_LINES / 2) {
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+ irqt = __raw_readl(AVIC_INTTYPEL) & ~(1 << irq);
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+ __raw_writel(irqt | (!!type << irq), AVIC_INTTYPEL);
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+ } else {
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+ irq -= MXC_MAX_INT_LINES / 2;
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+ irqt = __raw_readl(AVIC_INTTYPEH) & ~(1 << irq);
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+ __raw_writel(irqt | (!!type << irq), AVIC_INTTYPEH);
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+ }
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+
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+ return 0;
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+}
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+EXPORT_SYMBOL(mxc_set_irq_fiq);
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+#endif /* CONFIG_FIQ */
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+
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/* Disable interrupt number "irq" in the AVIC */
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static void mxc_mask_irq(unsigned int irq)
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{
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@@ -119,5 +143,10 @@ void __init mxc_init_irq(void)
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/* init architectures chained interrupt handler */
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mxc_register_gpios();
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+#ifdef CONFIG_FIQ
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+ /* Initialize FIQ */
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+ init_FIQ();
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+#endif
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+
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printk(KERN_INFO "MXC IRQ initialized\n");
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}
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