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@@ -249,6 +249,7 @@ static __inline__ int radeon_check_and_fixup_packets(drm_radeon_private_t *
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case R200_EMIT_PP_TXCTLALL_3:
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case R200_EMIT_PP_TXCTLALL_3:
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case R200_EMIT_PP_TXCTLALL_4:
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case R200_EMIT_PP_TXCTLALL_4:
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case R200_EMIT_PP_TXCTLALL_5:
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case R200_EMIT_PP_TXCTLALL_5:
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+ case R200_EMIT_VAP_PVS_CNTL:
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/* These packets don't contain memory offsets */
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/* These packets don't contain memory offsets */
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break;
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break;
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@@ -626,6 +627,7 @@ static struct {
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{R200_PP_TXFILTER_3, 8, "R200_PP_TXCTLALL_3"},
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{R200_PP_TXFILTER_3, 8, "R200_PP_TXCTLALL_3"},
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{R200_PP_TXFILTER_4, 8, "R200_PP_TXCTLALL_4"},
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{R200_PP_TXFILTER_4, 8, "R200_PP_TXCTLALL_4"},
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{R200_PP_TXFILTER_5, 8, "R200_PP_TXCTLALL_5"},
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{R200_PP_TXFILTER_5, 8, "R200_PP_TXCTLALL_5"},
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+ {R200_VAP_PVS_CNTL_1, 2, "R200_VAP_PVS_CNTL"},
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};
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};
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/* ================================================================
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/* ================================================================
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@@ -2608,6 +2610,32 @@ static __inline__ int radeon_emit_vectors(drm_radeon_private_t *dev_priv,
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return 0;
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return 0;
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}
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}
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+static __inline__ int radeon_emit_veclinear(drm_radeon_private_t *dev_priv,
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+ drm_radeon_cmd_header_t header,
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+ drm_radeon_kcmd_buffer_t *cmdbuf)
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+{
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+ int sz = header.veclinear.count * 4;
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+ int start = header.veclinear.addr_lo | (header.veclinear.addr_hi << 8);
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+ RING_LOCALS;
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+
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+ if (!sz)
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+ return 0;
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+ if (sz * 4 > cmdbuf->bufsz)
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+ return DRM_ERR(EINVAL);
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+
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+ BEGIN_RING(5 + sz);
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+ OUT_RING_REG(RADEON_SE_TCL_STATE_FLUSH, 0);
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+ OUT_RING(CP_PACKET0(RADEON_SE_TCL_VECTOR_INDX_REG, 0));
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+ OUT_RING(start | (1 << RADEON_VEC_INDX_OCTWORD_STRIDE_SHIFT));
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+ OUT_RING(CP_PACKET0_TABLE(RADEON_SE_TCL_VECTOR_DATA_REG, (sz - 1)));
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+ OUT_RING_TABLE(cmdbuf->buf, sz);
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+ ADVANCE_RING();
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+
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+ cmdbuf->buf += sz * sizeof(int);
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+ cmdbuf->bufsz -= sz * sizeof(int);
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+ return 0;
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+}
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+
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static int radeon_emit_packet3(drm_device_t * dev,
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static int radeon_emit_packet3(drm_device_t * dev,
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drm_file_t * filp_priv,
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drm_file_t * filp_priv,
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drm_radeon_kcmd_buffer_t *cmdbuf)
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drm_radeon_kcmd_buffer_t *cmdbuf)
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@@ -2866,6 +2894,14 @@ static int radeon_cp_cmdbuf(DRM_IOCTL_ARGS)
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goto err;
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goto err;
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}
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}
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break;
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break;
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+ case RADEON_CMD_VECLINEAR:
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+ DRM_DEBUG("RADEON_CMD_VECLINEAR\n");
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+ if (radeon_emit_veclinear(dev_priv, header, &cmdbuf)) {
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+ DRM_ERROR("radeon_emit_veclinear failed\n");
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+ goto err;
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+ }
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+ break;
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+
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default:
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default:
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DRM_ERROR("bad cmd_type %d at %p\n",
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DRM_ERROR("bad cmd_type %d at %p\n",
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header.header.cmd_type,
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header.header.cmd_type,
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