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@@ -75,8 +75,6 @@ copy_from_user_nmi(void *to, const void __user *from, unsigned long n)
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return len;
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}
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-static u64 perf_event_mask __read_mostly;
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-
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struct event_constraint {
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union {
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unsigned long idxmsk[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
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@@ -1406,7 +1404,7 @@ void __init init_hw_perf_events(void)
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x86_pmu.num_events, X86_PMC_MAX_GENERIC);
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x86_pmu.num_events = X86_PMC_MAX_GENERIC;
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}
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- perf_event_mask = (1 << x86_pmu.num_events) - 1;
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+ x86_pmu.intel_ctrl = (1 << x86_pmu.num_events) - 1;
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perf_max_events = x86_pmu.num_events;
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if (x86_pmu.num_events_fixed > X86_PMC_MAX_FIXED) {
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@@ -1415,9 +1413,8 @@ void __init init_hw_perf_events(void)
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x86_pmu.num_events_fixed = X86_PMC_MAX_FIXED;
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}
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- perf_event_mask |=
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+ x86_pmu.intel_ctrl |=
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((1LL << x86_pmu.num_events_fixed)-1) << X86_PMC_IDX_FIXED;
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- x86_pmu.intel_ctrl = perf_event_mask;
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perf_events_lapic_init();
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register_die_notifier(&perf_event_nmi_notifier);
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@@ -1442,7 +1439,7 @@ void __init init_hw_perf_events(void)
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pr_info("... value mask: %016Lx\n", x86_pmu.event_mask);
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pr_info("... max period: %016Lx\n", x86_pmu.max_period);
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pr_info("... fixed-purpose events: %d\n", x86_pmu.num_events_fixed);
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- pr_info("... event mask: %016Lx\n", perf_event_mask);
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+ pr_info("... event mask: %016Lx\n", x86_pmu.intel_ctrl);
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perf_cpu_notifier(x86_pmu_notifier);
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}
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