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@@ -24,7 +24,6 @@
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#define CRB_CMDPEG_STATE QLA82XX_REG(0x50)
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#define CRB_CMDPEG_STATE QLA82XX_REG(0x50)
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#define CRB_RCVPEG_STATE QLA82XX_REG(0x13c)
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#define CRB_RCVPEG_STATE QLA82XX_REG(0x13c)
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-#define BOOT_LOADER_DIMM_STATUS QLA82XX_REG(0x54)
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#define CRB_DMA_SHIFT QLA82XX_REG(0xcc)
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#define CRB_DMA_SHIFT QLA82XX_REG(0xcc)
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#define QLA82XX_HW_H0_CH_HUB_ADR 0x05
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#define QLA82XX_HW_H0_CH_HUB_ADR 0x05
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@@ -529,8 +528,6 @@
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# define QLA82XX_CAM_RAM_BASE (QLA82XX_CRB_CAM + 0x02000)
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# define QLA82XX_CAM_RAM_BASE (QLA82XX_CRB_CAM + 0x02000)
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# define QLA82XX_CAM_RAM(reg) (QLA82XX_CAM_RAM_BASE + (reg))
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# define QLA82XX_CAM_RAM(reg) (QLA82XX_CAM_RAM_BASE + (reg))
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-#define QLA82XX_PEG_TUNE_MN_SPD_ZEROED 0x80000000
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-#define QLA82XX_BOOT_LOADER_MN_ISSUE 0xff00ffff
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#define QLA82XX_PORT_MODE_ADDR (QLA82XX_CAM_RAM(0x24))
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#define QLA82XX_PORT_MODE_ADDR (QLA82XX_CAM_RAM(0x24))
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#define QLA82XX_PEG_HALT_STATUS1 (QLA82XX_CAM_RAM(0xa8))
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#define QLA82XX_PEG_HALT_STATUS1 (QLA82XX_CAM_RAM(0xa8))
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#define QLA82XX_PEG_HALT_STATUS2 (QLA82XX_CAM_RAM(0xac))
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#define QLA82XX_PEG_HALT_STATUS2 (QLA82XX_CAM_RAM(0xac))
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