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@@ -676,13 +676,20 @@ int speround_handler(struct pt_regs *regs)
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type = insn_type(speinsn & 0x7ff);
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if (type == XCR) return -ENOSYS;
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+ __FPU_FPSCR = mfspr(SPRN_SPEFSCR);
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+ pr_debug("speinsn:%08lx spefscr:%08lx\n", speinsn, __FPU_FPSCR);
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+
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+ /* No need to round if the result is exact */
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+ if (!(__FPU_FPSCR & FP_EX_INEXACT))
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+ return 0;
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+
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fc = (speinsn >> 21) & 0x1f;
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s_lo = regs->gpr[fc] & SIGN_BIT_S;
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s_hi = current->thread.evr[fc] & SIGN_BIT_S;
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fgpr.wp[0] = current->thread.evr[fc];
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fgpr.wp[1] = regs->gpr[fc];
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- __FPU_FPSCR = mfspr(SPRN_SPEFSCR);
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+ pr_debug("round fgpr: %08x %08x\n", fgpr.wp[0], fgpr.wp[1]);
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switch ((speinsn >> 5) & 0x7) {
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/* Since SPE instructions on E500 core can handle round to nearest
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@@ -722,6 +729,8 @@ int speround_handler(struct pt_regs *regs)
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current->thread.evr[fc] = fgpr.wp[0];
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regs->gpr[fc] = fgpr.wp[1];
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+ pr_debug(" to fgpr: %08x %08x\n", fgpr.wp[0], fgpr.wp[1]);
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+
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return 0;
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}
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