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@@ -126,6 +126,7 @@ enum mem_type {
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MEM_RMBS, /* Rambus DRAM */
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MEM_RMBS, /* Rambus DRAM */
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MEM_DDR2, /* DDR2 RAM */
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MEM_DDR2, /* DDR2 RAM */
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MEM_FB_DDR2, /* fully buffered DDR2 */
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MEM_FB_DDR2, /* fully buffered DDR2 */
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+ MEM_RDDR2, /* Registered DDR2 RAM */
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};
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};
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#define MEM_FLAG_EMPTY BIT(MEM_EMPTY)
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#define MEM_FLAG_EMPTY BIT(MEM_EMPTY)
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@@ -141,6 +142,7 @@ enum mem_type {
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#define MEM_FLAG_RMBS BIT(MEM_RMBS)
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#define MEM_FLAG_RMBS BIT(MEM_RMBS)
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#define MEM_FLAG_DDR2 BIT(MEM_DDR2)
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#define MEM_FLAG_DDR2 BIT(MEM_DDR2)
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#define MEM_FLAG_FB_DDR2 BIT(MEM_FB_DDR2)
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#define MEM_FLAG_FB_DDR2 BIT(MEM_FB_DDR2)
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+#define MEM_FLAG_RDDR2 BIT(MEM_RDDR2)
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/* chipset Error Detection and Correction capabilities and mode */
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/* chipset Error Detection and Correction capabilities and mode */
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enum edac_type {
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enum edac_type {
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