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@@ -25,6 +25,16 @@
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#include "selftest.h"
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#include "workarounds.h"
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+/* IRQ latency can be enormous because:
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+ * - All IRQs may be disabled on a CPU for a *long* time by e.g. a
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+ * slow serial console or an old IDE driver doing error recovery
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+ * - The PREEMPT_RT patches mostly deal with this, but also allow a
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+ * tasklet or normal task to be given higher priority than our IRQ
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+ * threads
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+ * Try to avoid blaming the hardware for this.
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+ */
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+#define IRQ_TIMEOUT HZ
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+
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/*
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* Loopback test packet structure
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*
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@@ -77,6 +87,9 @@ struct efx_loopback_state {
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struct efx_loopback_payload payload;
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};
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+/* How long to wait for all the packets to arrive (in ms) */
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+#define LOOPBACK_TIMEOUT_MS 1000
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+
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/**************************************************************************
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*
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* MII, NVRAM and register tests
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@@ -130,23 +143,25 @@ static int efx_test_chip(struct efx_nic *efx, struct efx_self_tests *tests)
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static int efx_test_interrupts(struct efx_nic *efx,
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struct efx_self_tests *tests)
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{
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+ unsigned long timeout, wait;
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int cpu;
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netif_dbg(efx, drv, efx->net_dev, "testing interrupts\n");
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tests->interrupt = -1;
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- /* Reset interrupt flag */
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- efx->last_irq_cpu = -1;
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- smp_wmb();
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-
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- efx_nic_generate_interrupt(efx);
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+ efx_nic_irq_test_start(efx);
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+ timeout = jiffies + IRQ_TIMEOUT;
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+ wait = 1;
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/* Wait for arrival of test interrupt. */
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netif_dbg(efx, drv, efx->net_dev, "waiting for test interrupt\n");
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- schedule_timeout_uninterruptible(HZ / 10);
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- cpu = ACCESS_ONCE(efx->last_irq_cpu);
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- if (cpu >= 0)
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- goto success;
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+ do {
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+ schedule_timeout_uninterruptible(wait);
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+ cpu = efx_nic_irq_test_irq_cpu(efx);
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+ if (cpu >= 0)
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+ goto success;
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+ wait *= 2;
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+ } while (time_before(jiffies, timeout));
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netif_err(efx, drv, efx->net_dev, "timed out waiting for interrupt\n");
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return -ETIMEDOUT;
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@@ -159,61 +174,86 @@ static int efx_test_interrupts(struct efx_nic *efx,
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}
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/* Test generation and receipt of interrupting events */
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-static int efx_test_eventq_irq(struct efx_channel *channel,
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+static int efx_test_eventq_irq(struct efx_nic *efx,
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struct efx_self_tests *tests)
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{
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- struct efx_nic *efx = channel->efx;
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- unsigned int read_ptr;
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- bool napi_ran, dma_seen, int_seen;
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+ struct efx_channel *channel;
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+ unsigned int read_ptr[EFX_MAX_CHANNELS];
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+ unsigned long napi_ran = 0, dma_pend = 0, int_pend = 0;
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+ unsigned long timeout, wait;
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- read_ptr = channel->eventq_read_ptr;
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- channel->last_irq_cpu = -1;
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- smp_wmb();
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+ BUILD_BUG_ON(EFX_MAX_CHANNELS > BITS_PER_LONG);
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- efx_nic_generate_test_event(channel);
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+ efx_for_each_channel(channel, efx) {
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+ read_ptr[channel->channel] = channel->eventq_read_ptr;
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+ set_bit(channel->channel, &dma_pend);
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+ set_bit(channel->channel, &int_pend);
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+ efx_nic_event_test_start(channel);
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+ }
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- /* Wait for arrival of interrupt. NAPI processing may or may
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+ timeout = jiffies + IRQ_TIMEOUT;
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+ wait = 1;
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+
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+ /* Wait for arrival of interrupts. NAPI processing may or may
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* not complete in time, but we can cope in any case.
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*/
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- msleep(10);
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- napi_disable(&channel->napi_str);
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- if (channel->eventq_read_ptr != read_ptr) {
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- napi_ran = true;
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- dma_seen = true;
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- int_seen = true;
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- } else {
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- napi_ran = false;
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- dma_seen = efx_nic_event_present(channel);
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- int_seen = ACCESS_ONCE(channel->last_irq_cpu) >= 0;
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- }
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- napi_enable(&channel->napi_str);
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- efx_nic_eventq_read_ack(channel);
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+ do {
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+ schedule_timeout_uninterruptible(wait);
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+
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+ efx_for_each_channel(channel, efx) {
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+ napi_disable(&channel->napi_str);
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+ if (channel->eventq_read_ptr !=
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+ read_ptr[channel->channel]) {
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+ set_bit(channel->channel, &napi_ran);
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+ clear_bit(channel->channel, &dma_pend);
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+ clear_bit(channel->channel, &int_pend);
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+ } else {
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+ if (efx_nic_event_present(channel))
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+ clear_bit(channel->channel, &dma_pend);
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+ if (efx_nic_event_test_irq_cpu(channel) >= 0)
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+ clear_bit(channel->channel, &int_pend);
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+ }
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+ napi_enable(&channel->napi_str);
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+ efx_nic_eventq_read_ack(channel);
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+ }
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- tests->eventq_dma[channel->channel] = dma_seen ? 1 : -1;
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- tests->eventq_int[channel->channel] = int_seen ? 1 : -1;
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+ wait *= 2;
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+ } while ((dma_pend || int_pend) && time_before(jiffies, timeout));
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- if (dma_seen && int_seen) {
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- netif_dbg(efx, drv, efx->net_dev,
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- "channel %d event queue passed (with%s NAPI)\n",
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- channel->channel, napi_ran ? "" : "out");
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- return 0;
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- } else {
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- /* Report failure and whether either interrupt or DMA worked */
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- netif_err(efx, drv, efx->net_dev,
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- "channel %d timed out waiting for event queue\n",
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- channel->channel);
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- if (int_seen)
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- netif_err(efx, drv, efx->net_dev,
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- "channel %d saw interrupt "
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- "during event queue test\n",
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- channel->channel);
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- if (dma_seen)
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+ efx_for_each_channel(channel, efx) {
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+ bool dma_seen = !test_bit(channel->channel, &dma_pend);
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+ bool int_seen = !test_bit(channel->channel, &int_pend);
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+
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+ tests->eventq_dma[channel->channel] = dma_seen ? 1 : -1;
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+ tests->eventq_int[channel->channel] = int_seen ? 1 : -1;
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+
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+ if (dma_seen && int_seen) {
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+ netif_dbg(efx, drv, efx->net_dev,
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+ "channel %d event queue passed (with%s NAPI)\n",
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+ channel->channel,
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+ test_bit(channel->channel, &napi_ran) ?
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+ "" : "out");
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+ } else {
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+ /* Report failure and whether either interrupt or DMA
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+ * worked
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+ */
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netif_err(efx, drv, efx->net_dev,
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- "channel %d event was generated, but "
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- "failed to trigger an interrupt\n",
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+ "channel %d timed out waiting for event queue\n",
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channel->channel);
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- return -ETIMEDOUT;
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+ if (int_seen)
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+ netif_err(efx, drv, efx->net_dev,
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+ "channel %d saw interrupt "
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+ "during event queue test\n",
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+ channel->channel);
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+ if (dma_seen)
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+ netif_err(efx, drv, efx->net_dev,
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+ "channel %d event was generated, but "
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+ "failed to trigger an interrupt\n",
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+ channel->channel);
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+ }
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}
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+
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+ return (dma_pend || int_pend) ? -ETIMEDOUT : 0;
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}
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static int efx_test_phy(struct efx_nic *efx, struct efx_self_tests *tests,
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@@ -516,10 +556,10 @@ efx_test_loopback(struct efx_tx_queue *tx_queue,
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begin_rc = efx_begin_loopback(tx_queue);
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/* This will normally complete very quickly, but be
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- * prepared to wait up to 100 ms. */
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+ * prepared to wait much longer. */
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msleep(1);
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if (!efx_poll_loopback(efx)) {
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- msleep(100);
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+ msleep(LOOPBACK_TIMEOUT_MS);
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efx_poll_loopback(efx);
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}
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@@ -660,9 +700,10 @@ int efx_selftest(struct efx_nic *efx, struct efx_self_tests *tests,
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enum efx_loopback_mode loopback_mode = efx->loopback_mode;
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int phy_mode = efx->phy_mode;
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enum reset_type reset_method = RESET_TYPE_INVISIBLE;
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- struct efx_channel *channel;
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int rc_test = 0, rc_reset = 0, rc;
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+ efx_selftest_async_cancel(efx);
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+
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/* Online (i.e. non-disruptive) testing
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* This checks interrupt generation, event delivery and PHY presence. */
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@@ -678,11 +719,9 @@ int efx_selftest(struct efx_nic *efx, struct efx_self_tests *tests,
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if (rc && !rc_test)
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rc_test = rc;
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- efx_for_each_channel(channel, efx) {
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- rc = efx_test_eventq_irq(channel, tests);
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- if (rc && !rc_test)
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- rc_test = rc;
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- }
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+ rc = efx_test_eventq_irq(efx, tests);
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+ if (rc && !rc_test)
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+ rc_test = rc;
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if (rc_test)
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return rc_test;
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@@ -757,3 +796,36 @@ int efx_selftest(struct efx_nic *efx, struct efx_self_tests *tests,
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return rc_test;
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}
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+void efx_selftest_async_start(struct efx_nic *efx)
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+{
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+ struct efx_channel *channel;
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+
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+ efx_for_each_channel(channel, efx)
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+ efx_nic_event_test_start(channel);
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+ schedule_delayed_work(&efx->selftest_work, IRQ_TIMEOUT);
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+}
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+
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+void efx_selftest_async_cancel(struct efx_nic *efx)
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+{
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+ cancel_delayed_work_sync(&efx->selftest_work);
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+}
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+
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+void efx_selftest_async_work(struct work_struct *data)
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+{
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+ struct efx_nic *efx = container_of(data, struct efx_nic,
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+ selftest_work.work);
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+ struct efx_channel *channel;
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+ int cpu;
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+
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+ efx_for_each_channel(channel, efx) {
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+ cpu = efx_nic_event_test_irq_cpu(channel);
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+ if (cpu < 0)
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+ netif_err(efx, ifup, efx->net_dev,
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+ "channel %d failed to trigger an interrupt\n",
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+ channel->channel);
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+ else
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+ netif_dbg(efx, ifup, efx->net_dev,
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+ "channel %d triggered interrupt on CPU %d\n",
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+ channel->channel, cpu);
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+ }
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+}
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David S. Miller