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@@ -16,6 +16,7 @@
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#include <linux/nl80211.h>
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#include <linux/pci.h>
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+#include <linux/pci-aspm.h>
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#include <linux/ath9k_platform.h>
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#include "ath9k.h"
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@@ -115,12 +116,38 @@ static void ath_pci_extn_synch_enable(struct ath_common *common)
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pci_write_config_byte(pdev, sc->sc_ah->caps.pcie_lcr_offset, lnkctl);
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}
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+static void ath_pci_aspm_init(struct ath_common *common)
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+{
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+ struct ath_softc *sc = (struct ath_softc *) common->priv;
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+ struct ath_hw *ah = sc->sc_ah;
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+ struct pci_dev *pdev = to_pci_dev(sc->dev);
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+ struct pci_dev *parent;
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+ int pos;
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+ u8 aspm;
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+
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+ if (!pci_is_pcie(pdev))
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+ return;
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+
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+ parent = pdev->bus->self;
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+ if (WARN_ON(!parent))
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+ return;
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+
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+ pos = pci_pcie_cap(parent);
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+ pci_read_config_byte(parent, pos + PCI_EXP_LNKCTL, &aspm);
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+ if (aspm & (PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1)) {
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+ ah->aspm_enabled = true;
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+ /* Initialize PCIe PM and SERDES registers. */
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+ ath9k_hw_configpcipowersave(ah, 0, 0);
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+ }
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+}
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+
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static const struct ath_bus_ops ath_pci_bus_ops = {
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.ath_bus_type = ATH_PCI,
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.read_cachesize = ath_pci_read_cachesize,
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.eeprom_read = ath_pci_eeprom_read,
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.bt_coex_prep = ath_pci_bt_coex_prep,
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.extn_synch_en = ath_pci_extn_synch_enable,
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+ .aspm_init = ath_pci_aspm_init,
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};
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static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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