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@@ -2674,6 +2674,7 @@ int r600_irq_process(struct radeon_device *rdev)
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u32 last_entry = rdev->ih.ring_size - 16;
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u32 ring_index, disp_int, disp_int_cont, disp_int_cont2;
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unsigned long flags;
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+ bool queue_hotplug = false;
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DRM_DEBUG("r600_irq_process start: rptr %d, wptr %d\n", rptr, wptr);
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@@ -2745,37 +2746,43 @@ restart_ih:
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case 0:
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if (disp_int & DC_HPD1_INTERRUPT) {
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disp_int &= ~DC_HPD1_INTERRUPT;
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- DRM_INFO("IH: HPD1\n");
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+ queue_hotplug = true;
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+ DRM_DEBUG("IH: HPD1\n");
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}
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break;
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case 1:
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if (disp_int & DC_HPD2_INTERRUPT) {
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disp_int &= ~DC_HPD2_INTERRUPT;
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- DRM_INFO("IH: HPD2\n");
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+ queue_hotplug = true;
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+ DRM_DEBUG("IH: HPD2\n");
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}
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break;
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case 4:
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if (disp_int_cont & DC_HPD3_INTERRUPT) {
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disp_int_cont &= ~DC_HPD3_INTERRUPT;
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- DRM_INFO("IH: HPD3\n");
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+ queue_hotplug = true;
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+ DRM_DEBUG("IH: HPD3\n");
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}
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break;
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case 5:
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if (disp_int_cont & DC_HPD4_INTERRUPT) {
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disp_int_cont &= ~DC_HPD4_INTERRUPT;
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- DRM_INFO("IH: HPD4\n");
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+ queue_hotplug = true;
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+ DRM_DEBUG("IH: HPD4\n");
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}
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break;
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case 10:
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if (disp_int_cont2 & DC_HPD5_INTERRUPT) {
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disp_int_cont &= ~DC_HPD5_INTERRUPT;
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- DRM_INFO("IH: HPD5\n");
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+ queue_hotplug = true;
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+ DRM_DEBUG("IH: HPD5\n");
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}
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break;
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case 12:
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if (disp_int_cont2 & DC_HPD6_INTERRUPT) {
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disp_int_cont &= ~DC_HPD6_INTERRUPT;
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- DRM_INFO("IH: HPD6\n");
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+ queue_hotplug = true;
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+ DRM_DEBUG("IH: HPD6\n");
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}
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break;
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default:
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@@ -2807,6 +2814,8 @@ restart_ih:
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wptr = r600_get_ih_wptr(rdev);
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if (wptr != rdev->ih.wptr)
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goto restart_ih;
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+ if (queue_hotplug)
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+ queue_work(rdev->wq, &rdev->hotplug_work);
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rdev->ih.rptr = rptr;
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WREG32(IH_RB_RPTR, rdev->ih.rptr);
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spin_unlock_irqrestore(&rdev->ih.lock, flags);
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