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@@ -102,6 +102,17 @@ static const int omap24xx_dma_reqs[][2] = {
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static const int omap24xx_dma_reqs[][2] = {};
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#endif
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+#if defined(CONFIG_ARCH_OMAP4)
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+static const int omap44xx_dma_reqs[][2] = {
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+ { OMAP44XX_DMA_MCBSP1_TX, OMAP44XX_DMA_MCBSP1_RX },
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+ { OMAP44XX_DMA_MCBSP2_TX, OMAP44XX_DMA_MCBSP2_RX },
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+ { OMAP44XX_DMA_MCBSP3_TX, OMAP44XX_DMA_MCBSP3_RX },
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+ { OMAP44XX_DMA_MCBSP4_TX, OMAP44XX_DMA_MCBSP4_RX },
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+};
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+#else
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+static const int omap44xx_dma_reqs[][2] = {};
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+#endif
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+
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#if defined(CONFIG_ARCH_OMAP2420)
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static const unsigned long omap2420_mcbsp_port[][2] = {
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{ OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1,
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@@ -147,6 +158,21 @@ static const unsigned long omap34xx_mcbsp_port[][2] = {
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static const unsigned long omap34xx_mcbsp_port[][2] = {};
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#endif
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+#if defined(CONFIG_ARCH_OMAP4)
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+static const unsigned long omap44xx_mcbsp_port[][2] = {
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+ { OMAP44XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR,
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+ OMAP44XX_MCBSP1_BASE + OMAP_MCBSP_REG_DRR },
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+ { OMAP44XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR,
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+ OMAP44XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR },
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+ { OMAP44XX_MCBSP3_BASE + OMAP_MCBSP_REG_DXR,
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+ OMAP44XX_MCBSP3_BASE + OMAP_MCBSP_REG_DRR },
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+ { OMAP44XX_MCBSP4_BASE + OMAP_MCBSP_REG_DXR,
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+ OMAP44XX_MCBSP4_BASE + OMAP_MCBSP_REG_DRR },
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+};
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+#else
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+static const unsigned long omap44xx_mcbsp_port[][2] = {};
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+#endif
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+
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static void omap_mcbsp_set_threshold(struct snd_pcm_substream *substream)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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@@ -224,7 +250,7 @@ static int omap_mcbsp_dai_startup(struct snd_pcm_substream *substream,
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* 2 channels (stereo): size is 128 / 2 = 64 frames (2 * 64 words)
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* 4 channels: size is 128 / 4 = 32 frames (4 * 32 words)
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*/
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- if (cpu_is_omap343x()) {
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+ if (cpu_is_omap343x() || cpu_is_omap44xx()) {
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/*
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* Rule for the buffer size. We should not allow
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* smaller buffer than the FIFO size to avoid underruns
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@@ -332,6 +358,9 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream,
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} else if (cpu_is_omap343x()) {
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dma = omap24xx_dma_reqs[bus_id][substream->stream];
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port = omap34xx_mcbsp_port[bus_id][substream->stream];
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+ } else if (cpu_is_omap44xx()) {
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+ dma = omap44xx_dma_reqs[bus_id][substream->stream];
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+ port = omap44xx_mcbsp_port[bus_id][substream->stream];
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} else {
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return -ENODEV;
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}
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@@ -498,11 +527,11 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai,
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regs->spcr2 |= XINTM(3) | FREE;
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regs->spcr1 |= RINTM(3);
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/* RFIG and XFIG are not defined in 34xx */
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- if (!cpu_is_omap34xx()) {
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+ if (!cpu_is_omap34xx() && !cpu_is_omap44xx()) {
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regs->rcr2 |= RFIG;
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regs->xcr2 |= XFIG;
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}
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- if (cpu_is_omap2430() || cpu_is_omap34xx()) {
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+ if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
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regs->xccr = DXENDLY(1) | XDMAEN | XDISABLE;
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regs->rccr = RFULL_CYCLE | RDMAEN | RDISABLE;
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}
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