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@@ -176,7 +176,7 @@ struct clk_gate {
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u8 bit_idx;
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u8 flags;
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spinlock_t *lock;
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- char *parent[1];
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+ const char *parent[1];
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};
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#define CLK_GATE_SET_TO_DISABLE BIT(0)
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@@ -214,7 +214,7 @@ struct clk_divider {
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u8 width;
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u8 flags;
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spinlock_t *lock;
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- char *parent[1];
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+ const char *parent[1];
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};
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#define CLK_DIVIDER_ONE_BASED BIT(0)
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@@ -257,7 +257,7 @@ struct clk_mux {
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extern const struct clk_ops clk_mux_ops;
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struct clk *clk_register_mux(struct device *dev, const char *name,
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- char **parent_names, u8 num_parents, unsigned long flags,
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+ const char **parent_names, u8 num_parents, unsigned long flags,
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void __iomem *reg, u8 shift, u8 width,
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u8 clk_mux_flags, spinlock_t *lock);
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@@ -278,7 +278,7 @@ struct clk *clk_register_mux(struct device *dev, const char *name,
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*/
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struct clk *clk_register(struct device *dev, const char *name,
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const struct clk_ops *ops, struct clk_hw *hw,
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- char **parent_names, u8 num_parents, unsigned long flags);
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+ const char **parent_names, u8 num_parents, unsigned long flags);
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/* helper functions */
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const char *__clk_get_name(struct clk *clk);
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