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@@ -317,6 +317,8 @@
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#define MXC_MAX_INT_LINES 64
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#define MXC_MAX_INT_LINES 64
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#define MXC_GPIO_INT_BASE MXC_MAX_INT_LINES
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#define MXC_GPIO_INT_BASE MXC_MAX_INT_LINES
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+#define MXC_MAX_GPIO_LINES (GPIO_NUM_PIN * GPIO_PORT_NUM)
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+#define MXC_MAX_VIRTUAL_INTS 16
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/*!
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/*!
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* Number of GPIO port as defined in the IC Spec
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* Number of GPIO port as defined in the IC Spec
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@@ -329,7 +331,33 @@
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#define PROD_SIGNATURE 0x1 /* For MX31 */
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#define PROD_SIGNATURE 0x1 /* For MX31 */
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+/* silicon revisions specific to i.MX31 */
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+#define CHIP_REV_1_0 0x10
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+#define CHIP_REV_1_1 0x11
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+#define CHIP_REV_1_2 0x12
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+#define CHIP_REV_1_3 0x13
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+#define CHIP_REV_2_0 0x20
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+#define CHIP_REV_2_1 0x21
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+#define CHIP_REV_2_2 0x22
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+#define CHIP_REV_2_3 0x23
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+#define CHIP_REV_3_0 0x30
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+#define CHIP_REV_3_1 0x31
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+#define CHIP_REV_3_2 0x32
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+
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#define SYSTEM_REV_MIN CHIP_REV_1_0
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#define SYSTEM_REV_MIN CHIP_REV_1_0
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#define SYSTEM_REV_NUM 3
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#define SYSTEM_REV_NUM 3
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-#endif /* __ASM_ARCH_MXC_MX31_H__ */
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+#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS)
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+
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+/* this is a i.MX31 CPU */
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+#define cpu_is_mx31() (1)
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+
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+extern unsigned int system_rev;
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+
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+static inline int mx31_revision(void)
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+{
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+ return system_rev;
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+}
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+#endif
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+
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+#endif /* __ASM_ARCH_MXC_MX31_H__ */
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