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powerpc/85xx: TQM8548: DTS file fixes and cleanup

Due to the missing compatible property for the SOC, the MPC I2C buses are
not found any more. This patch fixes this issue. Furthermore it corrects
the name of the SOC node and adds the missing I2C node for the RTC.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Wolfgang Grandegger 17 jaren geleden
bovenliggende
commit
d27a736c7a
2 gewijzigde bestanden met toevoegingen van 9 en 2 verwijderingen
  1. 7 1
      arch/powerpc/boot/dts/tqm8548-bigflash.dts
  2. 2 1
      arch/powerpc/boot/dts/tqm8548.dts

+ 7 - 1
arch/powerpc/boot/dts/tqm8548-bigflash.dts

@@ -50,13 +50,14 @@
 		reg = <0x00000000 0x00000000>;	// Filled in by U-Boot
 		reg = <0x00000000 0x00000000>;	// Filled in by U-Boot
 	};
 	};
 
 
-	soc8548@a0000000 {
+	soc@a0000000 {
 		#address-cells = <1>;
 		#address-cells = <1>;
 		#size-cells = <1>;
 		#size-cells = <1>;
 		device_type = "soc";
 		device_type = "soc";
 		ranges = <0x0 0xa0000000 0x100000>;
 		ranges = <0x0 0xa0000000 0x100000>;
 		reg = <0xa0000000 0x1000>;	// CCSRBAR
 		reg = <0xa0000000 0x1000>;	// CCSRBAR
 		bus-frequency = <0>;
 		bus-frequency = <0>;
+		compatible = "fsl,mpc8548-immr", "simple-bus";
 
 
 		memory-controller@2000 {
 		memory-controller@2000 {
 			compatible = "fsl,mpc8548-memory-controller";
 			compatible = "fsl,mpc8548-memory-controller";
@@ -83,6 +84,11 @@
 			interrupts = <43 2>;
 			interrupts = <43 2>;
 			interrupt-parent = <&mpic>;
 			interrupt-parent = <&mpic>;
 			dfsrr;
 			dfsrr;
+
+			rtc@68 {
+				compatible = "dallas,ds1337";
+				reg = <0x68>;
+			};
 		};
 		};
 
 
 		i2c@3100 {
 		i2c@3100 {

+ 2 - 1
arch/powerpc/boot/dts/tqm8548.dts

@@ -50,13 +50,14 @@
 		reg = <0x00000000 0x00000000>;	// Filled in by U-Boot
 		reg = <0x00000000 0x00000000>;	// Filled in by U-Boot
 	};
 	};
 
 
-	soc8548@e0000000 {
+	soc@e0000000 {
 		#address-cells = <1>;
 		#address-cells = <1>;
 		#size-cells = <1>;
 		#size-cells = <1>;
 		device_type = "soc";
 		device_type = "soc";
 		ranges = <0x0 0xe0000000 0x100000>;
 		ranges = <0x0 0xe0000000 0x100000>;
 		reg = <0xe0000000 0x1000>;	// CCSRBAR
 		reg = <0xe0000000 0x1000>;	// CCSRBAR
 		bus-frequency = <0>;
 		bus-frequency = <0>;
+		compatible = "fsl,mpc8548-immr", "simple-bus";
 
 
 		memory-controller@2000 {
 		memory-controller@2000 {
 			compatible = "fsl,mpc8548-memory-controller";
 			compatible = "fsl,mpc8548-memory-controller";