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@@ -50,13 +50,14 @@
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reg = <0x00000000 0x00000000>; // Filled in by U-Boot
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reg = <0x00000000 0x00000000>; // Filled in by U-Boot
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};
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};
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- soc8548@a0000000 {
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+ soc@a0000000 {
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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device_type = "soc";
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ranges = <0x0 0xa0000000 0x100000>;
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ranges = <0x0 0xa0000000 0x100000>;
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reg = <0xa0000000 0x1000>; // CCSRBAR
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reg = <0xa0000000 0x1000>; // CCSRBAR
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bus-frequency = <0>;
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bus-frequency = <0>;
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+ compatible = "fsl,mpc8548-immr", "simple-bus";
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memory-controller@2000 {
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memory-controller@2000 {
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compatible = "fsl,mpc8548-memory-controller";
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compatible = "fsl,mpc8548-memory-controller";
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@@ -83,6 +84,11 @@
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interrupts = <43 2>;
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interrupts = <43 2>;
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interrupt-parent = <&mpic>;
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interrupt-parent = <&mpic>;
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dfsrr;
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dfsrr;
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+
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+ rtc@68 {
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+ compatible = "dallas,ds1337";
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+ reg = <0x68>;
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+ };
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};
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};
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i2c@3100 {
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i2c@3100 {
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