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@@ -26,12 +26,7 @@
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#define NUM_COUNTERS 4
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#define NUM_CONTROLS 4
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-#define CTR_READ(l, h, msrs, c) do {rdmsr(msrs->counters[(c)].addr, (l), (h)); } while (0)
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-#define CTR_WRITE(l, msrs, c) do {wrmsr(msrs->counters[(c)].addr, -(unsigned int)(l), -1); } while (0)
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#define CTR_OVERFLOWED(n) (!((n) & (1U<<31)))
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-
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-#define CTRL_READ(l, h, msrs, c) do {rdmsr(msrs->controls[(c)].addr, (l), (h)); } while (0)
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-#define CTRL_WRITE(l, h, msrs, c) do {wrmsr(msrs->controls[(c)].addr, (l), (h)); } while (0)
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#define CTRL_CLEAR_LO(x) (x &= (1<<21))
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#define CTRL_CLEAR_HI(x) (x &= 0xfffffcf0)
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#define CTRL_SET_EVENT_LOW(val, e) (val |= (e & 0xff))
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@@ -101,17 +96,17 @@ static void op_amd_setup_ctrs(struct op_msrs const * const msrs)
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for (i = 0 ; i < NUM_CONTROLS; ++i) {
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if (unlikely(!CTRL_IS_RESERVED(msrs, i)))
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continue;
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- CTRL_READ(low, high, msrs, i);
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+ rdmsr(msrs->controls[i].addr, low, high);
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CTRL_CLEAR_LO(low);
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CTRL_CLEAR_HI(high);
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- CTRL_WRITE(low, high, msrs, i);
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+ wrmsr(msrs->controls[i].addr, low, high);
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}
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/* avoid a false detection of ctr overflows in NMI handler */
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for (i = 0; i < NUM_COUNTERS; ++i) {
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if (unlikely(!CTR_IS_RESERVED(msrs, i)))
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continue;
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- CTR_WRITE(1, msrs, i);
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+ wrmsr(msrs->counters[i].addr, -1, -1);
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}
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/* enable active counters */
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@@ -119,9 +114,9 @@ static void op_amd_setup_ctrs(struct op_msrs const * const msrs)
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if ((counter_config[i].enabled) && (CTR_IS_RESERVED(msrs, i))) {
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reset_value[i] = counter_config[i].count;
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- CTR_WRITE(counter_config[i].count, msrs, i);
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+ wrmsr(msrs->counters[i].addr, -(unsigned int)counter_config[i].count, -1);
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- CTRL_READ(low, high, msrs, i);
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+ rdmsr(msrs->controls[i].addr, low, high);
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CTRL_CLEAR_LO(low);
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CTRL_CLEAR_HI(high);
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CTRL_SET_ENABLE(low);
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@@ -133,7 +128,7 @@ static void op_amd_setup_ctrs(struct op_msrs const * const msrs)
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CTRL_SET_HOST_ONLY(high, 0);
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CTRL_SET_GUEST_ONLY(high, 0);
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- CTRL_WRITE(low, high, msrs, i);
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+ wrmsr(msrs->controls[i].addr, low, high);
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} else {
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reset_value[i] = 0;
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}
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@@ -267,10 +262,10 @@ static int op_amd_check_ctrs(struct pt_regs * const regs,
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for (i = 0 ; i < NUM_COUNTERS; ++i) {
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if (!reset_value[i])
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continue;
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- CTR_READ(low, high, msrs, i);
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+ rdmsr(msrs->counters[i].addr, low, high);
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if (CTR_OVERFLOWED(low)) {
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oprofile_add_sample(regs, i);
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- CTR_WRITE(reset_value[i], msrs, i);
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+ wrmsr(msrs->counters[i].addr, -(unsigned int)reset_value[i], -1);
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}
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}
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@@ -286,9 +281,9 @@ static void op_amd_start(struct op_msrs const * const msrs)
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int i;
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for (i = 0 ; i < NUM_COUNTERS ; ++i) {
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if (reset_value[i]) {
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- CTRL_READ(low, high, msrs, i);
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+ rdmsr(msrs->controls[i].addr, low, high);
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CTRL_SET_ACTIVE(low);
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- CTRL_WRITE(low, high, msrs, i);
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+ wrmsr(msrs->controls[i].addr, low, high);
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}
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}
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@@ -307,9 +302,9 @@ static void op_amd_stop(struct op_msrs const * const msrs)
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for (i = 0 ; i < NUM_COUNTERS ; ++i) {
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if (!reset_value[i])
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continue;
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- CTRL_READ(low, high, msrs, i);
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+ rdmsr(msrs->controls[i].addr, low, high);
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CTRL_SET_INACTIVE(low);
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- CTRL_WRITE(low, high, msrs, i);
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+ wrmsr(msrs->controls[i].addr, low, high);
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}
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op_amd_stop_ibs();
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