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@@ -23,20 +23,16 @@
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#include <mach/iomap.h>
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#include "fuse.h"
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+#include "apbio.h"
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#define FUSE_UID_LOW 0x108
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#define FUSE_UID_HIGH 0x10c
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#define FUSE_SKU_INFO 0x110
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#define FUSE_SPARE_BIT 0x200
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-static inline u32 fuse_readl(unsigned long offset)
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+static inline u32 tegra_fuse_readl(unsigned long offset)
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{
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- return readl(IO_TO_VIRT(TEGRA_FUSE_BASE + offset));
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-}
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-
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-static inline void fuse_writel(u32 value, unsigned long offset)
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-{
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- writel(value, IO_TO_VIRT(TEGRA_FUSE_BASE + offset));
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+ return tegra_apb_readl(TEGRA_FUSE_BASE + offset);
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}
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void tegra_init_fuse(void)
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@@ -54,15 +50,15 @@ unsigned long long tegra_chip_uid(void)
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{
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unsigned long long lo, hi;
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- lo = fuse_readl(FUSE_UID_LOW);
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- hi = fuse_readl(FUSE_UID_HIGH);
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+ lo = tegra_fuse_readl(FUSE_UID_LOW);
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+ hi = tegra_fuse_readl(FUSE_UID_HIGH);
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return (hi << 32ull) | lo;
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}
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int tegra_sku_id(void)
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{
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int sku_id;
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- u32 reg = fuse_readl(FUSE_SKU_INFO);
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+ u32 reg = tegra_fuse_readl(FUSE_SKU_INFO);
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sku_id = reg & 0xFF;
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return sku_id;
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}
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@@ -70,7 +66,7 @@ int tegra_sku_id(void)
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int tegra_cpu_process_id(void)
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{
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int cpu_process_id;
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- u32 reg = fuse_readl(FUSE_SPARE_BIT);
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+ u32 reg = tegra_fuse_readl(FUSE_SPARE_BIT);
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cpu_process_id = (reg >> 6) & 3;
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return cpu_process_id;
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}
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@@ -78,7 +74,7 @@ int tegra_cpu_process_id(void)
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int tegra_core_process_id(void)
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{
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int core_process_id;
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- u32 reg = fuse_readl(FUSE_SPARE_BIT);
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+ u32 reg = tegra_fuse_readl(FUSE_SPARE_BIT);
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core_process_id = (reg >> 12) & 3;
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return core_process_id;
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}
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