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@@ -380,6 +380,17 @@ int cx18_firmware_init(struct cx18 *cx)
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if (sz <= 0)
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return -EIO;
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}
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+
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+ /*
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+ * The CPU firmware apparently sets up to receive an interrupt for it's
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+ * outgoing IRQ_CPU_TO_EPU_ACK to us (*boggle*). We get an interrupt
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+ * when it sends us an ack, but by the time we process it, that flag in
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+ * the SW2 status register has been cleared by the CPU firmware.
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+ * We'll prevent that not so useful behavior by clearing the CPU's
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+ * interrupt enables for Ack IRQ's we want to process.
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+ */
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+ cx18_sw2_irq_disable_cpu(cx, IRQ_CPU_TO_EPU_ACK | IRQ_APU_TO_EPU_ACK);
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+
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/* initialize GPIO */
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cx18_write_reg_expect(cx, 0x14001400, 0xc78110, 0x00001400, 0x14001400);
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return 0;
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