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@@ -10219,8 +10219,15 @@ static void bnx2x_54618se_link_reset(struct bnx2x_phy *phy,
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u32 cfg_pin;
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u8 port;
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- /* This works with E3 only, no need to check the chip
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- before determining the port. */
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+ /*
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+ * In case of no EPIO routed to reset the GPHY, put it
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+ * in low power mode.
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+ */
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+ bnx2x_cl22_write(bp, phy, MDIO_PMA_REG_CTRL, 0x800);
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+ /*
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+ * This works with E3 only, no need to check the chip
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+ * before determining the port.
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+ */
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port = params->port;
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cfg_pin = (REG_RD(bp, params->shmem_base +
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offsetof(struct shmem_region,
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