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@@ -33,9 +33,9 @@ BFA_TRC_FILE(CNA, IOC_CT);
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static bfa_status_t bfa_ioc_ct_pll_init(struct bfa_ioc_s *ioc);
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static bfa_boolean_t bfa_ioc_ct_firmware_lock(struct bfa_ioc_s *ioc);
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static void bfa_ioc_ct_firmware_unlock(struct bfa_ioc_s *ioc);
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-static uint32_t* bfa_ioc_ct_fwimg_get_chunk(struct bfa_ioc_s *ioc,
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- uint32_t off);
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-static uint32_t bfa_ioc_ct_fwimg_get_size(struct bfa_ioc_s *ioc);
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+static u32* bfa_ioc_ct_fwimg_get_chunk(struct bfa_ioc_s *ioc,
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+ u32 off);
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+static u32 bfa_ioc_ct_fwimg_get_size(struct bfa_ioc_s *ioc);
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static void bfa_ioc_ct_reg_init(struct bfa_ioc_s *ioc);
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static void bfa_ioc_ct_map_port(struct bfa_ioc_s *ioc);
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static void bfa_ioc_ct_isr_mode_set(struct bfa_ioc_s *ioc, bfa_boolean_t msix);
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@@ -64,13 +64,13 @@ bfa_ioc_set_ct_hwif(struct bfa_ioc_s *ioc)
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ioc->ioc_hwif = &hwif_ct;
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}
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-static uint32_t*
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-bfa_ioc_ct_fwimg_get_chunk(struct bfa_ioc_s *ioc, uint32_t off)
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+static u32*
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+bfa_ioc_ct_fwimg_get_chunk(struct bfa_ioc_s *ioc, u32 off)
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{
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return bfi_image_ct_get_chunk(off);
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}
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-static uint32_t
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+static u32
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bfa_ioc_ct_fwimg_get_size(struct bfa_ioc_s *ioc)
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{
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return bfi_image_ct_size;
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@@ -83,7 +83,7 @@ static bfa_boolean_t
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bfa_ioc_ct_firmware_lock(struct bfa_ioc_s *ioc)
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{
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enum bfi_ioc_state ioc_fwstate;
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- uint32_t usecnt;
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+ u32 usecnt;
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struct bfi_ioc_image_hdr_s fwhdr;
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/**
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@@ -142,7 +142,7 @@ bfa_ioc_ct_firmware_lock(struct bfa_ioc_s *ioc)
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static void
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bfa_ioc_ct_firmware_unlock(struct bfa_ioc_s *ioc)
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{
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- uint32_t usecnt;
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+ u32 usecnt;
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/**
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* Firmware lock is relevant only for CNA.
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@@ -184,7 +184,7 @@ bfa_ioc_ct_notify_hbfail(struct bfa_ioc_s *ioc)
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/**
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* Host to LPU mailbox message addresses
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*/
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-static struct { uint32_t hfn_mbox, lpu_mbox, hfn_pgn; } iocreg_fnreg[] = {
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+static struct { u32 hfn_mbox, lpu_mbox, hfn_pgn; } iocreg_fnreg[] = {
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{ HOSTFN0_LPU_MBOX0_0, LPU_HOSTFN0_MBOX0_0, HOST_PAGE_NUM_FN0 },
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{ HOSTFN1_LPU_MBOX0_8, LPU_HOSTFN1_MBOX0_8, HOST_PAGE_NUM_FN1 },
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{ HOSTFN2_LPU_MBOX0_0, LPU_HOSTFN2_MBOX0_0, HOST_PAGE_NUM_FN2 },
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@@ -194,7 +194,7 @@ static struct { uint32_t hfn_mbox, lpu_mbox, hfn_pgn; } iocreg_fnreg[] = {
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/**
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* Host <-> LPU mailbox command/status registers - port 0
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*/
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-static struct { uint32_t hfn, lpu; } iocreg_mbcmd_p0[] = {
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+static struct { u32 hfn, lpu; } iocreg_mbcmd_p0[] = {
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{ HOSTFN0_LPU0_MBOX0_CMD_STAT, LPU0_HOSTFN0_MBOX0_CMD_STAT },
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{ HOSTFN1_LPU0_MBOX0_CMD_STAT, LPU0_HOSTFN1_MBOX0_CMD_STAT },
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{ HOSTFN2_LPU0_MBOX0_CMD_STAT, LPU0_HOSTFN2_MBOX0_CMD_STAT },
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@@ -204,7 +204,7 @@ static struct { uint32_t hfn, lpu; } iocreg_mbcmd_p0[] = {
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/**
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* Host <-> LPU mailbox command/status registers - port 1
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*/
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-static struct { uint32_t hfn, lpu; } iocreg_mbcmd_p1[] = {
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+static struct { u32 hfn, lpu; } iocreg_mbcmd_p1[] = {
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{ HOSTFN0_LPU1_MBOX0_CMD_STAT, LPU1_HOSTFN0_MBOX0_CMD_STAT },
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{ HOSTFN1_LPU1_MBOX0_CMD_STAT, LPU1_HOSTFN1_MBOX0_CMD_STAT },
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{ HOSTFN2_LPU1_MBOX0_CMD_STAT, LPU1_HOSTFN2_MBOX0_CMD_STAT },
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@@ -274,7 +274,7 @@ static void
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bfa_ioc_ct_map_port(struct bfa_ioc_s *ioc)
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{
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bfa_os_addr_t rb = ioc->pcidev.pci_bar_kva;
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- uint32_t r32;
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+ u32 r32;
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/**
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* For catapult, base port id on personality register and IOC type
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@@ -294,7 +294,7 @@ static void
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bfa_ioc_ct_isr_mode_set(struct bfa_ioc_s *ioc, bfa_boolean_t msix)
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{
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bfa_os_addr_t rb = ioc->pcidev.pci_bar_kva;
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- uint32_t r32, mode;
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+ u32 r32, mode;
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r32 = bfa_reg_read(rb + FNC_PERS_REG);
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bfa_trc(ioc, r32);
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@@ -324,7 +324,7 @@ static bfa_status_t
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bfa_ioc_ct_pll_init(struct bfa_ioc_s *ioc)
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{
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bfa_os_addr_t rb = ioc->pcidev.pci_bar_kva;
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- uint32_t pll_sclk, pll_fclk, r32;
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+ u32 pll_sclk, pll_fclk, r32;
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/*
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* Hold semaphore so that nobody can access the chip during init.
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