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@@ -38,7 +38,7 @@
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*/
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/* Ack all interrupt on CSR and IRQSTATUS_L0 */
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-static void omap24xxcam_dmahw_ack_all(unsigned long base)
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+static void omap24xxcam_dmahw_ack_all(void __iomem *base)
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{
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u32 csr;
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int i;
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@@ -52,7 +52,7 @@ static void omap24xxcam_dmahw_ack_all(unsigned long base)
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}
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/* Ack dmach on CSR and IRQSTATUS_L0 */
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-static u32 omap24xxcam_dmahw_ack_ch(unsigned long base, int dmach)
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+static u32 omap24xxcam_dmahw_ack_ch(void __iomem *base, int dmach)
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{
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u32 csr;
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@@ -65,12 +65,12 @@ static u32 omap24xxcam_dmahw_ack_ch(unsigned long base, int dmach)
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return csr;
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}
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-static int omap24xxcam_dmahw_running(unsigned long base, int dmach)
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+static int omap24xxcam_dmahw_running(void __iomem *base, int dmach)
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{
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return omap24xxcam_reg_in(base, CAMDMA_CCR(dmach)) & CAMDMA_CCR_ENABLE;
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}
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-static void omap24xxcam_dmahw_transfer_setup(unsigned long base, int dmach,
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+static void omap24xxcam_dmahw_transfer_setup(void __iomem *base, int dmach,
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dma_addr_t start, u32 len)
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{
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omap24xxcam_reg_out(base, CAMDMA_CCR(dmach),
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@@ -112,7 +112,7 @@ static void omap24xxcam_dmahw_transfer_setup(unsigned long base, int dmach,
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| CAMDMA_CICR_DROP_IE);
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}
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-static void omap24xxcam_dmahw_transfer_start(unsigned long base, int dmach)
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+static void omap24xxcam_dmahw_transfer_start(void __iomem *base, int dmach)
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{
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omap24xxcam_reg_out(base, CAMDMA_CCR(dmach),
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CAMDMA_CCR_SEL_SRC_DST_SYNC
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@@ -124,7 +124,7 @@ static void omap24xxcam_dmahw_transfer_start(unsigned long base, int dmach)
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| CAMDMA_CCR_SYNCHRO_CAMERA);
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}
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-static void omap24xxcam_dmahw_transfer_chain(unsigned long base, int dmach,
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+static void omap24xxcam_dmahw_transfer_chain(void __iomem *base, int dmach,
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int free_dmach)
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{
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int prev_dmach, ch;
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@@ -160,7 +160,7 @@ static void omap24xxcam_dmahw_transfer_chain(unsigned long base, int dmach,
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* controller may not be idle after this routine completes, because
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* the completion routines might start new transfers.
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*/
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-static void omap24xxcam_dmahw_abort_ch(unsigned long base, int dmach)
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+static void omap24xxcam_dmahw_abort_ch(void __iomem *base, int dmach)
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{
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/* mask all interrupts from this channel */
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omap24xxcam_reg_out(base, CAMDMA_CICR(dmach), 0);
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@@ -171,7 +171,7 @@ static void omap24xxcam_dmahw_abort_ch(unsigned long base, int dmach)
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omap24xxcam_reg_merge(base, CAMDMA_CCR(dmach), 0, CAMDMA_CCR_ENABLE);
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}
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-static void omap24xxcam_dmahw_init(unsigned long base)
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+static void omap24xxcam_dmahw_init(void __iomem *base)
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{
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omap24xxcam_reg_out(base, CAMDMA_OCP_SYSCONFIG,
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CAMDMA_OCP_SYSCONFIG_MIDLEMODE_FSTANDBY
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@@ -362,7 +362,7 @@ void omap24xxcam_dma_hwinit(struct omap24xxcam_dma *dma)
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}
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static void omap24xxcam_dma_init(struct omap24xxcam_dma *dma,
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- unsigned long base)
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+ void __iomem *base)
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{
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int ch;
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@@ -577,7 +577,7 @@ void omap24xxcam_sgdma_sync(struct omap24xxcam_sgdma *sgdma)
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}
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void omap24xxcam_sgdma_init(struct omap24xxcam_sgdma *sgdma,
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- unsigned long base,
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+ void __iomem *base,
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void (*reset_callback)(unsigned long data),
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unsigned long reset_callback_data)
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{
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