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@@ -113,20 +113,17 @@ static __initdata struct tegra_clk_init_table tegra30_clk_init_table[] = {
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#endif
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-static void __init tegra_init_cache(u32 tag_latency, u32 data_latency)
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+static void __init tegra_init_cache(void)
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{
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#ifdef CONFIG_CACHE_L2X0
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void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000;
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u32 aux_ctrl, cache_type;
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- writel_relaxed(tag_latency, p + L2X0_TAG_LATENCY_CTRL);
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- writel_relaxed(data_latency, p + L2X0_DATA_LATENCY_CTRL);
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-
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cache_type = readl(p + L2X0_CACHE_TYPE);
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aux_ctrl = (cache_type & 0x700) << (17-8);
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aux_ctrl |= 0x6C000001;
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- l2x0_init(p, aux_ctrl, 0x8200c3fe);
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+ l2x0_of_init(aux_ctrl, 0x8200c3fe);
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#endif
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}
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@@ -138,7 +135,7 @@ void __init tegra20_init_early(void)
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tegra_init_fuse();
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tegra2_init_clocks();
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tegra_clk_init_from_table(tegra20_clk_init_table);
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- tegra_init_cache(0x331, 0x441);
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+ tegra_init_cache();
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tegra_pmc_init();
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tegra_powergate_init();
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tegra20_hotplug_init();
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@@ -151,7 +148,7 @@ void __init tegra30_init_early(void)
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tegra_init_fuse();
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tegra30_init_clocks();
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tegra_clk_init_from_table(tegra30_clk_init_table);
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- tegra_init_cache(0x441, 0x551);
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+ tegra_init_cache();
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tegra_pmc_init();
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tegra_powergate_init();
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tegra30_hotplug_init();
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