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@@ -18,6 +18,9 @@
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/include/ "skeleton.dtsi"
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/ {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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compatible = "ti,omap5";
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interrupt-parent = <&gic>;
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@@ -33,24 +36,32 @@
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cpus {
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cpu@0 {
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compatible = "arm,cortex-a15";
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- timer {
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- compatible = "arm,armv7-timer";
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- /* 14th PPI IRQ, active low level-sensitive */
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- interrupts = <1 14 0x308>;
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- clock-frequency = <6144000>;
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- };
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};
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cpu@1 {
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compatible = "arm,cortex-a15";
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- timer {
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- compatible = "arm,armv7-timer";
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- /* 14th PPI IRQ, active low level-sensitive */
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- interrupts = <1 14 0x308>;
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- clock-frequency = <6144000>;
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- };
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};
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};
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+ timer {
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+ compatible = "arm,armv7-timer";
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+ /* PPI secure/nonsecure IRQ, active low level-sensitive */
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+ interrupts = <1 13 0x308>,
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+ <1 14 0x308>,
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+ <1 11 0x308>,
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+ <1 10 0x308>;
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+ clock-frequency = <6144000>;
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+ };
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+
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+ gic: interrupt-controller@48211000 {
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+ compatible = "arm,cortex-a15-gic";
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+ interrupt-controller;
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+ #interrupt-cells = <3>;
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+ reg = <0x48211000 0x1000>,
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+ <0x48212000 0x1000>,
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+ <0x48214000 0x2000>,
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+ <0x48216000 0x2000>;
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+ };
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+
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/*
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* The soc node represents the soc top level view. It is uses for IPs
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* that are not memory mapped in the MPU view or for the MPU itself.
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@@ -76,6 +87,11 @@
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#size-cells = <1>;
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ranges;
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ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
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+ reg = <0x44000000 0x2000>,
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+ <0x44800000 0x3000>,
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+ <0x45000000 0x4000>;
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+ interrupts = <0 9 0x4>,
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+ <0 10 0x4>;
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counter32k: counter@4ae04000 {
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compatible = "ti,omap-counter32k";
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@@ -100,12 +116,16 @@
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pinctrl-single,function-mask = <0x7fff>;
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};
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- gic: interrupt-controller@48211000 {
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- compatible = "arm,cortex-a15-gic";
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- interrupt-controller;
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- #interrupt-cells = <3>;
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- reg = <0x48211000 0x1000>,
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- <0x48212000 0x1000>;
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+ sdma: dma-controller@4a056000 {
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+ compatible = "ti,omap4430-sdma";
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+ reg = <0x4a056000 0x1000>;
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+ interrupts = <0 12 0x4>,
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+ <0 13 0x4>,
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+ <0 14 0x4>,
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+ <0 15 0x4>;
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+ #dma-cells = <1>;
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+ #dma-channels = <32>;
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+ #dma-requests = <127>;
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};
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gpio1: gpio@4ae10000 {
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@@ -113,10 +133,11 @@
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reg = <0x4ae10000 0x200>;
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interrupts = <0 29 0x4>;
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ti,hwmods = "gpio1";
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+ ti,gpio-always-on;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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- #interrupt-cells = <1>;
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+ #interrupt-cells = <2>;
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};
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gpio2: gpio@48055000 {
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@@ -127,7 +148,7 @@
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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- #interrupt-cells = <1>;
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+ #interrupt-cells = <2>;
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};
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gpio3: gpio@48057000 {
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@@ -138,7 +159,7 @@
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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- #interrupt-cells = <1>;
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+ #interrupt-cells = <2>;
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};
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gpio4: gpio@48059000 {
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@@ -149,7 +170,7 @@
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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- #interrupt-cells = <1>;
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+ #interrupt-cells = <2>;
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};
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gpio5: gpio@4805b000 {
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@@ -160,7 +181,7 @@
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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- #interrupt-cells = <1>;
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+ #interrupt-cells = <2>;
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};
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gpio6: gpio@4805d000 {
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@@ -171,7 +192,7 @@
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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- #interrupt-cells = <1>;
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+ #interrupt-cells = <2>;
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};
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gpio7: gpio@48051000 {
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@@ -182,7 +203,7 @@
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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- #interrupt-cells = <1>;
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+ #interrupt-cells = <2>;
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};
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gpio8: gpio@48053000 {
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@@ -193,7 +214,18 @@
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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- #interrupt-cells = <1>;
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+ #interrupt-cells = <2>;
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+ };
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+
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+ gpmc: gpmc@50000000 {
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+ compatible = "ti,omap4430-gpmc";
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+ reg = <0x50000000 0x1000>;
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+ #address-cells = <2>;
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+ #size-cells = <1>;
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+ interrupts = <0 20 0x4>;
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+ gpmc,num-cs = <8>;
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+ gpmc,num-waitpins = <4>;
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+ ti,hwmods = "gpmc";
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};
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i2c1: i2c@48070000 {
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@@ -241,6 +273,65 @@
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ti,hwmods = "i2c5";
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};
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+ mcspi1: spi@48098000 {
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+ compatible = "ti,omap4-mcspi";
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+ reg = <0x48098000 0x200>;
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+ interrupts = <0 65 0x4>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ ti,hwmods = "mcspi1";
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+ ti,spi-num-cs = <4>;
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+ dmas = <&sdma 35>,
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+ <&sdma 36>,
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+ <&sdma 37>,
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+ <&sdma 38>,
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+ <&sdma 39>,
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+ <&sdma 40>,
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+ <&sdma 41>,
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+ <&sdma 42>;
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+ dma-names = "tx0", "rx0", "tx1", "rx1",
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+ "tx2", "rx2", "tx3", "rx3";
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+ };
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+
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+ mcspi2: spi@4809a000 {
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+ compatible = "ti,omap4-mcspi";
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+ reg = <0x4809a000 0x200>;
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+ interrupts = <0 66 0x4>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ ti,hwmods = "mcspi2";
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+ ti,spi-num-cs = <2>;
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+ dmas = <&sdma 43>,
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+ <&sdma 44>,
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+ <&sdma 45>,
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+ <&sdma 46>;
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+ dma-names = "tx0", "rx0", "tx1", "rx1";
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+ };
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+
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+ mcspi3: spi@480b8000 {
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+ compatible = "ti,omap4-mcspi";
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+ reg = <0x480b8000 0x200>;
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+ interrupts = <0 91 0x4>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ ti,hwmods = "mcspi3";
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+ ti,spi-num-cs = <2>;
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+ dmas = <&sdma 15>, <&sdma 16>;
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+ dma-names = "tx0", "rx0";
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+ };
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+
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+ mcspi4: spi@480ba000 {
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+ compatible = "ti,omap4-mcspi";
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+ reg = <0x480ba000 0x200>;
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+ interrupts = <0 48 0x4>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ ti,hwmods = "mcspi4";
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+ ti,spi-num-cs = <1>;
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+ dmas = <&sdma 70>, <&sdma 71>;
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+ dma-names = "tx0", "rx0";
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+ };
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+
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uart1: serial@4806a000 {
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compatible = "ti,omap4-uart";
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reg = <0x4806a000 0x100>;
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@@ -296,6 +387,8 @@
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ti,hwmods = "mmc1";
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ti,dual-volt;
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ti,needs-special-reset;
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+ dmas = <&sdma 61>, <&sdma 62>;
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+ dma-names = "tx", "rx";
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};
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mmc2: mmc@480b4000 {
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@@ -304,6 +397,8 @@
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interrupts = <0 86 0x4>;
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ti,hwmods = "mmc2";
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ti,needs-special-reset;
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+ dmas = <&sdma 47>, <&sdma 48>;
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+ dma-names = "tx", "rx";
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};
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mmc3: mmc@480ad000 {
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@@ -312,6 +407,8 @@
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interrupts = <0 94 0x4>;
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ti,hwmods = "mmc3";
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ti,needs-special-reset;
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+ dmas = <&sdma 77>, <&sdma 78>;
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+ dma-names = "tx", "rx";
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};
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mmc4: mmc@480d1000 {
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@@ -320,6 +417,8 @@
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interrupts = <0 96 0x4>;
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ti,hwmods = "mmc4";
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ti,needs-special-reset;
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+ dmas = <&sdma 57>, <&sdma 58>;
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+ dma-names = "tx", "rx";
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};
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mmc5: mmc@480d5000 {
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@@ -328,10 +427,13 @@
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interrupts = <0 59 0x4>;
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ti,hwmods = "mmc5";
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ti,needs-special-reset;
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+ dmas = <&sdma 59>, <&sdma 60>;
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+ dma-names = "tx", "rx";
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};
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keypad: keypad@4ae1c000 {
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compatible = "ti,omap4-keypad";
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+ reg = <0x4ae1c000 0x400>;
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ti,hwmods = "kbd";
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};
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@@ -342,6 +444,9 @@
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reg-names = "mpu", "dma";
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interrupts = <0 112 0x4>;
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ti,hwmods = "mcpdm";
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+ dmas = <&sdma 65>,
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+ <&sdma 66>;
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+ dma-names = "up_link", "dn_link";
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};
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dmic: dmic@4012e000 {
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@@ -351,6 +456,8 @@
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reg-names = "mpu", "dma";
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interrupts = <0 114 0x4>;
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ti,hwmods = "dmic";
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+ dmas = <&sdma 67>;
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+ dma-names = "up_link";
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};
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mcbsp1: mcbsp@40122000 {
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@@ -362,6 +469,9 @@
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interrupt-names = "common";
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ti,buffer-size = <128>;
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ti,hwmods = "mcbsp1";
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+ dmas = <&sdma 33>,
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+ <&sdma 34>;
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+ dma-names = "tx", "rx";
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};
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mcbsp2: mcbsp@40124000 {
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@@ -373,6 +483,9 @@
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interrupt-names = "common";
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ti,buffer-size = <128>;
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ti,hwmods = "mcbsp2";
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+ dmas = <&sdma 17>,
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+ <&sdma 18>;
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+ dma-names = "tx", "rx";
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};
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mcbsp3: mcbsp@40126000 {
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@@ -384,10 +497,13 @@
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interrupt-names = "common";
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ti,buffer-size = <128>;
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ti,hwmods = "mcbsp3";
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+ dmas = <&sdma 19>,
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+ <&sdma 20>;
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+ dma-names = "tx", "rx";
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};
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timer1: timer@4ae18000 {
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- compatible = "ti,omap2-timer";
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+ compatible = "ti,omap5430-timer";
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reg = <0x4ae18000 0x80>;
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interrupts = <0 37 0x4>;
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ti,hwmods = "timer1";
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@@ -395,28 +511,28 @@
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};
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timer2: timer@48032000 {
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- compatible = "ti,omap2-timer";
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+ compatible = "ti,omap5430-timer";
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reg = <0x48032000 0x80>;
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interrupts = <0 38 0x4>;
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ti,hwmods = "timer2";
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};
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timer3: timer@48034000 {
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- compatible = "ti,omap2-timer";
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+ compatible = "ti,omap5430-timer";
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reg = <0x48034000 0x80>;
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interrupts = <0 39 0x4>;
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ti,hwmods = "timer3";
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};
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timer4: timer@48036000 {
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- compatible = "ti,omap2-timer";
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+ compatible = "ti,omap5430-timer";
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reg = <0x48036000 0x80>;
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interrupts = <0 40 0x4>;
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ti,hwmods = "timer4";
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};
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timer5: timer@40138000 {
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- compatible = "ti,omap2-timer";
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+ compatible = "ti,omap5430-timer";
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reg = <0x40138000 0x80>,
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<0x49038000 0x80>;
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interrupts = <0 41 0x4>;
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@@ -425,7 +541,7 @@
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};
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timer6: timer@4013a000 {
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- compatible = "ti,omap2-timer";
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+ compatible = "ti,omap5430-timer";
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reg = <0x4013a000 0x80>,
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<0x4903a000 0x80>;
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interrupts = <0 42 0x4>;
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@@ -435,7 +551,7 @@
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};
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timer7: timer@4013c000 {
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- compatible = "ti,omap2-timer";
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+ compatible = "ti,omap5430-timer";
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reg = <0x4013c000 0x80>,
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<0x4903c000 0x80>;
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interrupts = <0 43 0x4>;
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@@ -444,7 +560,7 @@
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};
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timer8: timer@4013e000 {
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- compatible = "ti,omap2-timer";
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+ compatible = "ti,omap5430-timer";
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reg = <0x4013e000 0x80>,
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<0x4903e000 0x80>;
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interrupts = <0 44 0x4>;
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@@ -454,27 +570,34 @@
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};
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timer9: timer@4803e000 {
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- compatible = "ti,omap2-timer";
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+ compatible = "ti,omap5430-timer";
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reg = <0x4803e000 0x80>;
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interrupts = <0 45 0x4>;
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ti,hwmods = "timer9";
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};
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timer10: timer@48086000 {
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- compatible = "ti,omap2-timer";
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+ compatible = "ti,omap5430-timer";
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reg = <0x48086000 0x80>;
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interrupts = <0 46 0x4>;
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ti,hwmods = "timer10";
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};
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timer11: timer@48088000 {
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- compatible = "ti,omap2-timer";
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+ compatible = "ti,omap5430-timer";
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reg = <0x48088000 0x80>;
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interrupts = <0 47 0x4>;
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ti,hwmods = "timer11";
|
|
|
ti,timer-pwm;
|
|
|
};
|
|
|
|
|
|
+ wdt2: wdt@4ae14000 {
|
|
|
+ compatible = "ti,omap5-wdt", "ti,omap3-wdt";
|
|
|
+ reg = <0x4ae14000 0x80>;
|
|
|
+ interrupts = <0 80 0x4>;
|
|
|
+ ti,hwmods = "wd_timer2";
|
|
|
+ };
|
|
|
+
|
|
|
emif1: emif@0x4c000000 {
|
|
|
compatible = "ti,emif-4d5";
|
|
|
ti,hwmods = "emif1";
|
|
@@ -496,5 +619,53 @@
|
|
|
hw-caps-ll-interface;
|
|
|
hw-caps-temp-alert;
|
|
|
};
|
|
|
+
|
|
|
+ omap_control_usb: omap-control-usb@4a002300 {
|
|
|
+ compatible = "ti,omap-control-usb";
|
|
|
+ reg = <0x4a002300 0x4>,
|
|
|
+ <0x4a002370 0x4>;
|
|
|
+ reg-names = "control_dev_conf", "phy_power_usb";
|
|
|
+ ti,type = <2>;
|
|
|
+ };
|
|
|
+
|
|
|
+ omap_dwc3@4a020000 {
|
|
|
+ compatible = "ti,dwc3";
|
|
|
+ ti,hwmods = "usb_otg_ss";
|
|
|
+ reg = <0x4a020000 0x1000>;
|
|
|
+ interrupts = <0 93 4>;
|
|
|
+ #address-cells = <1>;
|
|
|
+ #size-cells = <1>;
|
|
|
+ utmi-mode = <2>;
|
|
|
+ ranges;
|
|
|
+ dwc3@4a030000 {
|
|
|
+ compatible = "synopsys,dwc3";
|
|
|
+ reg = <0x4a030000 0x1000>;
|
|
|
+ interrupts = <0 92 4>;
|
|
|
+ usb-phy = <&usb2_phy>, <&usb3_phy>;
|
|
|
+ tx-fifo-resize;
|
|
|
+ };
|
|
|
+ };
|
|
|
+
|
|
|
+ ocp2scp {
|
|
|
+ compatible = "ti,omap-ocp2scp";
|
|
|
+ #address-cells = <1>;
|
|
|
+ #size-cells = <1>;
|
|
|
+ ranges;
|
|
|
+ ti,hwmods = "ocp2scp1";
|
|
|
+ usb2_phy: usb2phy@4a084000 {
|
|
|
+ compatible = "ti,omap-usb2";
|
|
|
+ reg = <0x4a084000 0x7c>;
|
|
|
+ ctrl-module = <&omap_control_usb>;
|
|
|
+ };
|
|
|
+
|
|
|
+ usb3_phy: usb3phy@4a084400 {
|
|
|
+ compatible = "ti,omap-usb3";
|
|
|
+ reg = <0x4a084400 0x80>,
|
|
|
+ <0x4a084800 0x64>,
|
|
|
+ <0x4a084c00 0x40>;
|
|
|
+ reg-names = "phy_rx", "phy_tx", "pll_ctrl";
|
|
|
+ ctrl-module = <&omap_control_usb>;
|
|
|
+ };
|
|
|
+ };
|
|
|
};
|
|
|
};
|