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@@ -34,8 +34,6 @@
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#ifdef CONFIG_SMP
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-#ifndef CONFIG_HAVE_LEGACY_PER_CPU_AREA
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-
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/* minimum unit size, also is the maximum supported allocation size */
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#define PCPU_MIN_UNIT_SIZE PFN_ALIGN(64 << 10)
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@@ -130,30 +128,9 @@ extern int __init pcpu_page_first_chunk(size_t reserved_size,
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#define per_cpu_ptr(ptr, cpu) SHIFT_PERCPU_PTR((ptr), per_cpu_offset((cpu)))
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extern void *__alloc_reserved_percpu(size_t size, size_t align);
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-
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-#else /* CONFIG_HAVE_LEGACY_PER_CPU_AREA */
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-
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-struct percpu_data {
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- void *ptrs[1];
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-};
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-
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-/* pointer disguising messes up the kmemleak objects tracking */
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-#ifndef CONFIG_DEBUG_KMEMLEAK
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-#define __percpu_disguise(pdata) (struct percpu_data *)~(unsigned long)(pdata)
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-#else
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-#define __percpu_disguise(pdata) (struct percpu_data *)(pdata)
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-#endif
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-
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-#define per_cpu_ptr(ptr, cpu) \
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-({ \
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- struct percpu_data *__p = __percpu_disguise(ptr); \
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- (__typeof__(ptr))__p->ptrs[(cpu)]; \
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-})
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-
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-#endif /* CONFIG_HAVE_LEGACY_PER_CPU_AREA */
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-
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extern void *__alloc_percpu(size_t size, size_t align);
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extern void free_percpu(void *__pdata);
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+extern phys_addr_t per_cpu_ptr_to_phys(void *addr);
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#ifndef CONFIG_HAVE_SETUP_PER_CPU_AREA
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extern void __init setup_per_cpu_areas(void);
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@@ -179,6 +156,11 @@ static inline void free_percpu(void *p)
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kfree(p);
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}
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+static inline phys_addr_t per_cpu_ptr_to_phys(void *addr)
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+{
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+ return __pa(addr);
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+}
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+
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static inline void __init setup_per_cpu_areas(void) { }
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static inline void *pcpu_lpage_remapped(void *kaddr)
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@@ -188,8 +170,8 @@ static inline void *pcpu_lpage_remapped(void *kaddr)
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#endif /* CONFIG_SMP */
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-#define alloc_percpu(type) (type *)__alloc_percpu(sizeof(type), \
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- __alignof__(type))
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+#define alloc_percpu(type) \
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+ (typeof(type) *)__alloc_percpu(sizeof(type), __alignof__(type))
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/*
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* Optional methods for optimized non-lvalue per-cpu variable access.
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@@ -243,4 +225,404 @@ do { \
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# define percpu_xor(var, val) __percpu_generic_to_op(var, (val), ^=)
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#endif
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+/*
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+ * Branching function to split up a function into a set of functions that
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+ * are called for different scalar sizes of the objects handled.
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+ */
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+
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+extern void __bad_size_call_parameter(void);
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+
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+#define __pcpu_size_call_return(stem, variable) \
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+({ typeof(variable) pscr_ret__; \
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+ switch(sizeof(variable)) { \
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+ case 1: pscr_ret__ = stem##1(variable);break; \
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+ case 2: pscr_ret__ = stem##2(variable);break; \
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+ case 4: pscr_ret__ = stem##4(variable);break; \
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+ case 8: pscr_ret__ = stem##8(variable);break; \
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+ default: \
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+ __bad_size_call_parameter();break; \
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+ } \
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+ pscr_ret__; \
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+})
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+
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+#define __pcpu_size_call(stem, variable, ...) \
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+do { \
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+ switch(sizeof(variable)) { \
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+ case 1: stem##1(variable, __VA_ARGS__);break; \
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+ case 2: stem##2(variable, __VA_ARGS__);break; \
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+ case 4: stem##4(variable, __VA_ARGS__);break; \
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+ case 8: stem##8(variable, __VA_ARGS__);break; \
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+ default: \
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+ __bad_size_call_parameter();break; \
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+ } \
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+} while (0)
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+
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+/*
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+ * Optimized manipulation for memory allocated through the per cpu
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+ * allocator or for addresses of per cpu variables (can be determined
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+ * using per_cpu_var(xx).
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+ *
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+ * These operation guarantee exclusivity of access for other operations
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+ * on the *same* processor. The assumption is that per cpu data is only
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+ * accessed by a single processor instance (the current one).
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+ *
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+ * The first group is used for accesses that must be done in a
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+ * preemption safe way since we know that the context is not preempt
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+ * safe. Interrupts may occur. If the interrupt modifies the variable
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+ * too then RMW actions will not be reliable.
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+ *
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+ * The arch code can provide optimized functions in two ways:
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+ *
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+ * 1. Override the function completely. F.e. define this_cpu_add().
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+ * The arch must then ensure that the various scalar format passed
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+ * are handled correctly.
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+ *
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+ * 2. Provide functions for certain scalar sizes. F.e. provide
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+ * this_cpu_add_2() to provide per cpu atomic operations for 2 byte
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+ * sized RMW actions. If arch code does not provide operations for
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+ * a scalar size then the fallback in the generic code will be
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+ * used.
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+ */
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+
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+#define _this_cpu_generic_read(pcp) \
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+({ typeof(pcp) ret__; \
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+ preempt_disable(); \
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+ ret__ = *this_cpu_ptr(&(pcp)); \
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+ preempt_enable(); \
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+ ret__; \
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+})
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+
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+#ifndef this_cpu_read
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+# ifndef this_cpu_read_1
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+# define this_cpu_read_1(pcp) _this_cpu_generic_read(pcp)
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+# endif
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+# ifndef this_cpu_read_2
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+# define this_cpu_read_2(pcp) _this_cpu_generic_read(pcp)
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+# endif
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+# ifndef this_cpu_read_4
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+# define this_cpu_read_4(pcp) _this_cpu_generic_read(pcp)
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+# endif
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+# ifndef this_cpu_read_8
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+# define this_cpu_read_8(pcp) _this_cpu_generic_read(pcp)
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+# endif
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+# define this_cpu_read(pcp) __pcpu_size_call_return(this_cpu_read_, (pcp))
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+#endif
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+
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+#define _this_cpu_generic_to_op(pcp, val, op) \
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+do { \
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+ preempt_disable(); \
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+ *__this_cpu_ptr(&pcp) op val; \
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+ preempt_enable(); \
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+} while (0)
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+
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+#ifndef this_cpu_write
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+# ifndef this_cpu_write_1
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+# define this_cpu_write_1(pcp, val) _this_cpu_generic_to_op((pcp), (val), =)
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+# endif
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+# ifndef this_cpu_write_2
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+# define this_cpu_write_2(pcp, val) _this_cpu_generic_to_op((pcp), (val), =)
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+# endif
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+# ifndef this_cpu_write_4
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+# define this_cpu_write_4(pcp, val) _this_cpu_generic_to_op((pcp), (val), =)
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+# endif
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+# ifndef this_cpu_write_8
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+# define this_cpu_write_8(pcp, val) _this_cpu_generic_to_op((pcp), (val), =)
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+# endif
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+# define this_cpu_write(pcp, val) __pcpu_size_call(this_cpu_write_, (pcp), (val))
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+#endif
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+
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+#ifndef this_cpu_add
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+# ifndef this_cpu_add_1
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+# define this_cpu_add_1(pcp, val) _this_cpu_generic_to_op((pcp), (val), +=)
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+# endif
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+# ifndef this_cpu_add_2
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+# define this_cpu_add_2(pcp, val) _this_cpu_generic_to_op((pcp), (val), +=)
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+# endif
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+# ifndef this_cpu_add_4
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+# define this_cpu_add_4(pcp, val) _this_cpu_generic_to_op((pcp), (val), +=)
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+# endif
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+# ifndef this_cpu_add_8
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+# define this_cpu_add_8(pcp, val) _this_cpu_generic_to_op((pcp), (val), +=)
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+# endif
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+# define this_cpu_add(pcp, val) __pcpu_size_call(this_cpu_add_, (pcp), (val))
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+#endif
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+
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+#ifndef this_cpu_sub
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+# define this_cpu_sub(pcp, val) this_cpu_add((pcp), -(val))
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+#endif
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+
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+#ifndef this_cpu_inc
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+# define this_cpu_inc(pcp) this_cpu_add((pcp), 1)
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+#endif
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+
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+#ifndef this_cpu_dec
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+# define this_cpu_dec(pcp) this_cpu_sub((pcp), 1)
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+#endif
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+
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+#ifndef this_cpu_and
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+# ifndef this_cpu_and_1
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+# define this_cpu_and_1(pcp, val) _this_cpu_generic_to_op((pcp), (val), &=)
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+# endif
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+# ifndef this_cpu_and_2
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+# define this_cpu_and_2(pcp, val) _this_cpu_generic_to_op((pcp), (val), &=)
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+# endif
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+# ifndef this_cpu_and_4
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+# define this_cpu_and_4(pcp, val) _this_cpu_generic_to_op((pcp), (val), &=)
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+# endif
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+# ifndef this_cpu_and_8
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+# define this_cpu_and_8(pcp, val) _this_cpu_generic_to_op((pcp), (val), &=)
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+# endif
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+# define this_cpu_and(pcp, val) __pcpu_size_call(this_cpu_and_, (pcp), (val))
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+#endif
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+
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+#ifndef this_cpu_or
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+# ifndef this_cpu_or_1
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+# define this_cpu_or_1(pcp, val) _this_cpu_generic_to_op((pcp), (val), |=)
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+# endif
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+# ifndef this_cpu_or_2
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+# define this_cpu_or_2(pcp, val) _this_cpu_generic_to_op((pcp), (val), |=)
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+# endif
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+# ifndef this_cpu_or_4
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+# define this_cpu_or_4(pcp, val) _this_cpu_generic_to_op((pcp), (val), |=)
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+# endif
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+# ifndef this_cpu_or_8
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+# define this_cpu_or_8(pcp, val) _this_cpu_generic_to_op((pcp), (val), |=)
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+# endif
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+# define this_cpu_or(pcp, val) __pcpu_size_call(this_cpu_or_, (pcp), (val))
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+#endif
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+
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+#ifndef this_cpu_xor
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+# ifndef this_cpu_xor_1
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+# define this_cpu_xor_1(pcp, val) _this_cpu_generic_to_op((pcp), (val), ^=)
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+# endif
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+# ifndef this_cpu_xor_2
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+# define this_cpu_xor_2(pcp, val) _this_cpu_generic_to_op((pcp), (val), ^=)
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+# endif
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+# ifndef this_cpu_xor_4
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+# define this_cpu_xor_4(pcp, val) _this_cpu_generic_to_op((pcp), (val), ^=)
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+# endif
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+# ifndef this_cpu_xor_8
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+# define this_cpu_xor_8(pcp, val) _this_cpu_generic_to_op((pcp), (val), ^=)
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+# endif
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+# define this_cpu_xor(pcp, val) __pcpu_size_call(this_cpu_or_, (pcp), (val))
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+#endif
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+
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+/*
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+ * Generic percpu operations that do not require preemption handling.
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+ * Either we do not care about races or the caller has the
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+ * responsibility of handling preemptions issues. Arch code can still
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+ * override these instructions since the arch per cpu code may be more
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+ * efficient and may actually get race freeness for free (that is the
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+ * case for x86 for example).
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+ *
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+ * If there is no other protection through preempt disable and/or
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+ * disabling interupts then one of these RMW operations can show unexpected
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+ * behavior because the execution thread was rescheduled on another processor
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+ * or an interrupt occurred and the same percpu variable was modified from
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+ * the interrupt context.
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+ */
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+#ifndef __this_cpu_read
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+# ifndef __this_cpu_read_1
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+# define __this_cpu_read_1(pcp) (*__this_cpu_ptr(&(pcp)))
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+# endif
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+# ifndef __this_cpu_read_2
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+# define __this_cpu_read_2(pcp) (*__this_cpu_ptr(&(pcp)))
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+# endif
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+# ifndef __this_cpu_read_4
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+# define __this_cpu_read_4(pcp) (*__this_cpu_ptr(&(pcp)))
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+# endif
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+# ifndef __this_cpu_read_8
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+# define __this_cpu_read_8(pcp) (*__this_cpu_ptr(&(pcp)))
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+# endif
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+# define __this_cpu_read(pcp) __pcpu_size_call_return(__this_cpu_read_, (pcp))
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+#endif
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+
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+#define __this_cpu_generic_to_op(pcp, val, op) \
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+do { \
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+ *__this_cpu_ptr(&(pcp)) op val; \
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+} while (0)
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+
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+#ifndef __this_cpu_write
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+# ifndef __this_cpu_write_1
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+# define __this_cpu_write_1(pcp, val) __this_cpu_generic_to_op((pcp), (val), =)
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+# endif
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+# ifndef __this_cpu_write_2
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+# define __this_cpu_write_2(pcp, val) __this_cpu_generic_to_op((pcp), (val), =)
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+# endif
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+# ifndef __this_cpu_write_4
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+# define __this_cpu_write_4(pcp, val) __this_cpu_generic_to_op((pcp), (val), =)
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+# endif
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+# ifndef __this_cpu_write_8
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+# define __this_cpu_write_8(pcp, val) __this_cpu_generic_to_op((pcp), (val), =)
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+# endif
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+# define __this_cpu_write(pcp, val) __pcpu_size_call(__this_cpu_write_, (pcp), (val))
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+#endif
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+
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+#ifndef __this_cpu_add
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+# ifndef __this_cpu_add_1
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+# define __this_cpu_add_1(pcp, val) __this_cpu_generic_to_op((pcp), (val), +=)
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+# endif
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+# ifndef __this_cpu_add_2
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+# define __this_cpu_add_2(pcp, val) __this_cpu_generic_to_op((pcp), (val), +=)
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+# endif
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+# ifndef __this_cpu_add_4
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+# define __this_cpu_add_4(pcp, val) __this_cpu_generic_to_op((pcp), (val), +=)
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+# endif
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+# ifndef __this_cpu_add_8
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+# define __this_cpu_add_8(pcp, val) __this_cpu_generic_to_op((pcp), (val), +=)
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+# endif
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+# define __this_cpu_add(pcp, val) __pcpu_size_call(__this_cpu_add_, (pcp), (val))
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+#endif
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+
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+#ifndef __this_cpu_sub
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+# define __this_cpu_sub(pcp, val) __this_cpu_add((pcp), -(val))
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+#endif
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+
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+#ifndef __this_cpu_inc
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+# define __this_cpu_inc(pcp) __this_cpu_add((pcp), 1)
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+#endif
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+
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+#ifndef __this_cpu_dec
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+# define __this_cpu_dec(pcp) __this_cpu_sub((pcp), 1)
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+#endif
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+
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+#ifndef __this_cpu_and
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+# ifndef __this_cpu_and_1
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+# define __this_cpu_and_1(pcp, val) __this_cpu_generic_to_op((pcp), (val), &=)
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+# endif
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+# ifndef __this_cpu_and_2
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+# define __this_cpu_and_2(pcp, val) __this_cpu_generic_to_op((pcp), (val), &=)
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+# endif
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+# ifndef __this_cpu_and_4
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+# define __this_cpu_and_4(pcp, val) __this_cpu_generic_to_op((pcp), (val), &=)
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+# endif
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+# ifndef __this_cpu_and_8
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+# define __this_cpu_and_8(pcp, val) __this_cpu_generic_to_op((pcp), (val), &=)
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+# endif
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+# define __this_cpu_and(pcp, val) __pcpu_size_call(__this_cpu_and_, (pcp), (val))
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+#endif
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+
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+#ifndef __this_cpu_or
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+# ifndef __this_cpu_or_1
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+# define __this_cpu_or_1(pcp, val) __this_cpu_generic_to_op((pcp), (val), |=)
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+# endif
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+# ifndef __this_cpu_or_2
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+# define __this_cpu_or_2(pcp, val) __this_cpu_generic_to_op((pcp), (val), |=)
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+# endif
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+# ifndef __this_cpu_or_4
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+# define __this_cpu_or_4(pcp, val) __this_cpu_generic_to_op((pcp), (val), |=)
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+# endif
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+# ifndef __this_cpu_or_8
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+# define __this_cpu_or_8(pcp, val) __this_cpu_generic_to_op((pcp), (val), |=)
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+# endif
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+# define __this_cpu_or(pcp, val) __pcpu_size_call(__this_cpu_or_, (pcp), (val))
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+#endif
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+
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+#ifndef __this_cpu_xor
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+# ifndef __this_cpu_xor_1
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+# define __this_cpu_xor_1(pcp, val) __this_cpu_generic_to_op((pcp), (val), ^=)
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+# endif
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+# ifndef __this_cpu_xor_2
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+# define __this_cpu_xor_2(pcp, val) __this_cpu_generic_to_op((pcp), (val), ^=)
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+# endif
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+# ifndef __this_cpu_xor_4
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+# define __this_cpu_xor_4(pcp, val) __this_cpu_generic_to_op((pcp), (val), ^=)
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+# endif
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+# ifndef __this_cpu_xor_8
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+# define __this_cpu_xor_8(pcp, val) __this_cpu_generic_to_op((pcp), (val), ^=)
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+# endif
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+# define __this_cpu_xor(pcp, val) __pcpu_size_call(__this_cpu_xor_, (pcp), (val))
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+#endif
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+
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+/*
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+ * IRQ safe versions of the per cpu RMW operations. Note that these operations
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+ * are *not* safe against modification of the same variable from another
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+ * processors (which one gets when using regular atomic operations)
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+ . They are guaranteed to be atomic vs. local interrupts and
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+ * preemption only.
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+ */
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+#define irqsafe_cpu_generic_to_op(pcp, val, op) \
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+do { \
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+ unsigned long flags; \
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+ local_irq_save(flags); \
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+ *__this_cpu_ptr(&(pcp)) op val; \
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+ local_irq_restore(flags); \
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+} while (0)
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+
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+#ifndef irqsafe_cpu_add
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+# ifndef irqsafe_cpu_add_1
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+# define irqsafe_cpu_add_1(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), +=)
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+# endif
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+# ifndef irqsafe_cpu_add_2
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+# define irqsafe_cpu_add_2(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), +=)
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+# endif
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+# ifndef irqsafe_cpu_add_4
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+# define irqsafe_cpu_add_4(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), +=)
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+# endif
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+# ifndef irqsafe_cpu_add_8
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+# define irqsafe_cpu_add_8(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), +=)
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+# endif
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+# define irqsafe_cpu_add(pcp, val) __pcpu_size_call(irqsafe_cpu_add_, (pcp), (val))
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+#endif
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+
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+#ifndef irqsafe_cpu_sub
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+# define irqsafe_cpu_sub(pcp, val) irqsafe_cpu_add((pcp), -(val))
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+#endif
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+
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+#ifndef irqsafe_cpu_inc
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|
+# define irqsafe_cpu_inc(pcp) irqsafe_cpu_add((pcp), 1)
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|
|
+#endif
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+
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+#ifndef irqsafe_cpu_dec
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+# define irqsafe_cpu_dec(pcp) irqsafe_cpu_sub((pcp), 1)
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|
|
+#endif
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+
|
|
|
+#ifndef irqsafe_cpu_and
|
|
|
+# ifndef irqsafe_cpu_and_1
|
|
|
+# define irqsafe_cpu_and_1(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), &=)
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|
|
+# endif
|
|
|
+# ifndef irqsafe_cpu_and_2
|
|
|
+# define irqsafe_cpu_and_2(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), &=)
|
|
|
+# endif
|
|
|
+# ifndef irqsafe_cpu_and_4
|
|
|
+# define irqsafe_cpu_and_4(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), &=)
|
|
|
+# endif
|
|
|
+# ifndef irqsafe_cpu_and_8
|
|
|
+# define irqsafe_cpu_and_8(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), &=)
|
|
|
+# endif
|
|
|
+# define irqsafe_cpu_and(pcp, val) __pcpu_size_call(irqsafe_cpu_and_, (val))
|
|
|
+#endif
|
|
|
+
|
|
|
+#ifndef irqsafe_cpu_or
|
|
|
+# ifndef irqsafe_cpu_or_1
|
|
|
+# define irqsafe_cpu_or_1(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), |=)
|
|
|
+# endif
|
|
|
+# ifndef irqsafe_cpu_or_2
|
|
|
+# define irqsafe_cpu_or_2(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), |=)
|
|
|
+# endif
|
|
|
+# ifndef irqsafe_cpu_or_4
|
|
|
+# define irqsafe_cpu_or_4(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), |=)
|
|
|
+# endif
|
|
|
+# ifndef irqsafe_cpu_or_8
|
|
|
+# define irqsafe_cpu_or_8(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), |=)
|
|
|
+# endif
|
|
|
+# define irqsafe_cpu_or(pcp, val) __pcpu_size_call(irqsafe_cpu_or_, (val))
|
|
|
+#endif
|
|
|
+
|
|
|
+#ifndef irqsafe_cpu_xor
|
|
|
+# ifndef irqsafe_cpu_xor_1
|
|
|
+# define irqsafe_cpu_xor_1(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), ^=)
|
|
|
+# endif
|
|
|
+# ifndef irqsafe_cpu_xor_2
|
|
|
+# define irqsafe_cpu_xor_2(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), ^=)
|
|
|
+# endif
|
|
|
+# ifndef irqsafe_cpu_xor_4
|
|
|
+# define irqsafe_cpu_xor_4(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), ^=)
|
|
|
+# endif
|
|
|
+# ifndef irqsafe_cpu_xor_8
|
|
|
+# define irqsafe_cpu_xor_8(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), ^=)
|
|
|
+# endif
|
|
|
+# define irqsafe_cpu_xor(pcp, val) __pcpu_size_call(irqsafe_cpu_xor_, (val))
|
|
|
+#endif
|
|
|
+
|
|
|
#endif /* __LINUX_PERCPU_H */
|