|
@@ -13988,9 +13988,13 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
|
|
|
if (tg3_flag(tp, HW_TSO_1) ||
|
|
|
tg3_flag(tp, HW_TSO_2) ||
|
|
|
tg3_flag(tp, HW_TSO_3) ||
|
|
|
- (tp->fw_needed && !tg3_flag(tp, ENABLE_ASF)))
|
|
|
+ tp->fw_needed) {
|
|
|
+ /* For firmware TSO, assume ASF is disabled.
|
|
|
+ * We'll disable TSO later if we discover ASF
|
|
|
+ * is enabled in tg3_get_eeprom_hw_cfg().
|
|
|
+ */
|
|
|
tg3_flag_set(tp, TSO_CAPABLE);
|
|
|
- else {
|
|
|
+ } else {
|
|
|
tg3_flag_clear(tp, TSO_CAPABLE);
|
|
|
tg3_flag_clear(tp, TSO_BUG);
|
|
|
tp->fw_needed = NULL;
|
|
@@ -14266,6 +14270,12 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
|
|
|
*/
|
|
|
tg3_get_eeprom_hw_cfg(tp);
|
|
|
|
|
|
+ if (tp->fw_needed && tg3_flag(tp, ENABLE_ASF)) {
|
|
|
+ tg3_flag_clear(tp, TSO_CAPABLE);
|
|
|
+ tg3_flag_clear(tp, TSO_BUG);
|
|
|
+ tp->fw_needed = NULL;
|
|
|
+ }
|
|
|
+
|
|
|
if (tg3_flag(tp, ENABLE_APE)) {
|
|
|
/* Allow reads and writes to the
|
|
|
* APE register and memory space.
|