|
@@ -456,7 +456,7 @@ int __init mx35_clocks_init()
|
|
|
__raw_writel((3 << 26) | ll, CCM_BASE + CCM_CGR2);
|
|
|
__raw_writel(0, CCM_BASE + CCM_CGR3);
|
|
|
|
|
|
- mxc_timer_init(&ipg_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT);
|
|
|
+ mxc_timer_init(&gpt_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT);
|
|
|
|
|
|
return 0;
|
|
|
}
|