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@@ -21,6 +21,7 @@
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#include <linux/irq.h>
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#include <linux/bitrev.h>
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#include <linux/console.h>
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+#include <asm/cpuidle.h>
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#include <asm/io.h>
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#include <asm/tlbflush.h>
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#include <asm/suspend.h>
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@@ -71,20 +72,7 @@
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#ifdef CONFIG_PM
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-struct rmobile_pm_domain sh7372_pd_a4lc = {
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- .genpd.name = "A4LC",
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- .bit_shift = 1,
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-};
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-
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-struct rmobile_pm_domain sh7372_pd_a4mp = {
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- .genpd.name = "A4MP",
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- .bit_shift = 2,
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-};
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-
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-struct rmobile_pm_domain sh7372_pd_d4 = {
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- .genpd.name = "D4",
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- .bit_shift = 3,
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-};
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+#define PM_DOMAIN_ON_OFF_LATENCY_NS 250000
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static int sh7372_a4r_pd_suspend(void)
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{
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@@ -93,39 +81,25 @@ static int sh7372_a4r_pd_suspend(void)
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return 0;
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}
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-struct rmobile_pm_domain sh7372_pd_a4r = {
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- .genpd.name = "A4R",
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- .bit_shift = 5,
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- .suspend = sh7372_a4r_pd_suspend,
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- .resume = sh7372_intcs_resume,
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-};
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+static bool a4s_suspend_ready;
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-struct rmobile_pm_domain sh7372_pd_a3rv = {
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- .genpd.name = "A3RV",
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- .bit_shift = 6,
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-};
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-
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-struct rmobile_pm_domain sh7372_pd_a3ri = {
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- .genpd.name = "A3RI",
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- .bit_shift = 8,
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-};
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-
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-static int sh7372_pd_a4s_suspend(void)
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+static int sh7372_a4s_pd_suspend(void)
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{
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/*
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* The A4S domain contains the CPU core and therefore it should
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- * only be turned off if the CPU is in use.
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+ * only be turned off if the CPU is not in use. This may happen
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+ * during system suspend, when SYSC is going to be used for generating
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+ * resume signals and a4s_suspend_ready is set to let
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+ * sh7372_enter_suspend() know that it can turn A4S off.
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*/
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+ a4s_suspend_ready = true;
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return -EBUSY;
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}
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-struct rmobile_pm_domain sh7372_pd_a4s = {
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- .genpd.name = "A4S",
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- .bit_shift = 10,
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- .gov = &pm_domain_always_on_gov,
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- .no_debug = true,
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- .suspend = sh7372_pd_a4s_suspend,
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-};
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+static void sh7372_a4s_pd_resume(void)
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+{
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+ a4s_suspend_ready = false;
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+}
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static int sh7372_a3sp_pd_suspend(void)
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{
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@@ -136,18 +110,80 @@ static int sh7372_a3sp_pd_suspend(void)
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return console_suspend_enabled ? 0 : -EBUSY;
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}
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-struct rmobile_pm_domain sh7372_pd_a3sp = {
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- .genpd.name = "A3SP",
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- .bit_shift = 11,
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- .gov = &pm_domain_always_on_gov,
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- .no_debug = true,
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- .suspend = sh7372_a3sp_pd_suspend,
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+static struct rmobile_pm_domain sh7372_pm_domains[] = {
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+ {
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+ .genpd.name = "A4LC",
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+ .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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+ .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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+ .bit_shift = 1,
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+ },
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+ {
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+ .genpd.name = "A4MP",
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+ .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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+ .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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+ .bit_shift = 2,
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+ },
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+ {
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+ .genpd.name = "D4",
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+ .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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+ .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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+ .bit_shift = 3,
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+ },
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+ {
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+ .genpd.name = "A4R",
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+ .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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+ .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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+ .bit_shift = 5,
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+ .suspend = sh7372_a4r_pd_suspend,
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+ .resume = sh7372_intcs_resume,
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+ },
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+ {
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+ .genpd.name = "A3RV",
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+ .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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+ .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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+ .bit_shift = 6,
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+ },
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+ {
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+ .genpd.name = "A3RI",
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+ .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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+ .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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+ .bit_shift = 8,
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+ },
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+ {
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+ .genpd.name = "A4S",
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+ .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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+ .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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+ .bit_shift = 10,
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+ .gov = &pm_domain_always_on_gov,
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+ .no_debug = true,
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+ .suspend = sh7372_a4s_pd_suspend,
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+ .resume = sh7372_a4s_pd_resume,
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+ },
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+ {
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+ .genpd.name = "A3SP",
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+ .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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+ .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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+ .bit_shift = 11,
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+ .gov = &pm_domain_always_on_gov,
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+ .no_debug = true,
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+ .suspend = sh7372_a3sp_pd_suspend,
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+ },
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+ {
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+ .genpd.name = "A3SG",
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+ .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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+ .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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+ .bit_shift = 13,
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+ },
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};
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-struct rmobile_pm_domain sh7372_pd_a3sg = {
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- .genpd.name = "A3SG",
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- .bit_shift = 13,
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-};
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+void __init sh7372_init_pm_domains(void)
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+{
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+ rmobile_init_domains(sh7372_pm_domains, ARRAY_SIZE(sh7372_pm_domains));
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+ pm_genpd_add_subdomain_names("A4LC", "A3RV");
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+ pm_genpd_add_subdomain_names("A4R", "A4LC");
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+ pm_genpd_add_subdomain_names("A4S", "A3SG");
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+ pm_genpd_add_subdomain_names("A4S", "A3SP");
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+}
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#endif /* CONFIG_PM */
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@@ -303,6 +339,21 @@ static void sh7372_enter_a3sm_common(int pllc0_on)
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sh7372_set_reset_vector(__pa(sh7372_resume_core_standby_sysc));
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sh7372_enter_sysc(pllc0_on, 1 << 12);
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}
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+
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+static void sh7372_enter_a4s_common(int pllc0_on)
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+{
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+ sh7372_intca_suspend();
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+ sh7372_set_reset_vector(SMFRAM);
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+ sh7372_enter_sysc(pllc0_on, 1 << 10);
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+ sh7372_intca_resume();
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+}
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+
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+static void sh7372_pm_setup_smfram(void)
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+{
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+ memcpy((void *)SMFRAM, sh7372_resume_core_standby_sysc, 0x100);
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+}
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+#else
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+static inline void sh7372_pm_setup_smfram(void) {}
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#endif /* CONFIG_SUSPEND || CONFIG_CPU_IDLE */
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#ifdef CONFIG_CPU_IDLE
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@@ -312,7 +363,8 @@ static int sh7372_do_idle_core_standby(unsigned long unused)
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return 0;
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}
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-static void sh7372_enter_core_standby(void)
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+static int sh7372_enter_core_standby(struct cpuidle_device *dev,
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+ struct cpuidle_driver *drv, int index)
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{
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sh7372_set_reset_vector(__pa(sh7372_resume_core_standby_sysc));
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@@ -323,83 +375,102 @@ static void sh7372_enter_core_standby(void)
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/* disable reset vector translation */
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__raw_writel(0, SBAR);
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+
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+ return 1;
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}
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-static void sh7372_enter_a3sm_pll_on(void)
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+static int sh7372_enter_a3sm_pll_on(struct cpuidle_device *dev,
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+ struct cpuidle_driver *drv, int index)
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{
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sh7372_enter_a3sm_common(1);
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+ return 2;
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}
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-static void sh7372_enter_a3sm_pll_off(void)
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+static int sh7372_enter_a3sm_pll_off(struct cpuidle_device *dev,
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+ struct cpuidle_driver *drv, int index)
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{
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sh7372_enter_a3sm_common(0);
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+ return 3;
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}
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-static void sh7372_cpuidle_setup(struct cpuidle_driver *drv)
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+static int sh7372_enter_a4s(struct cpuidle_device *dev,
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+ struct cpuidle_driver *drv, int index)
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{
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- struct cpuidle_state *state = &drv->states[drv->state_count];
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-
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- snprintf(state->name, CPUIDLE_NAME_LEN, "C2");
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- strncpy(state->desc, "Core Standby Mode", CPUIDLE_DESC_LEN);
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- state->exit_latency = 10;
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- state->target_residency = 20 + 10;
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- state->flags = CPUIDLE_FLAG_TIME_VALID;
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- shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_core_standby;
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- drv->state_count++;
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-
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- state = &drv->states[drv->state_count];
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- snprintf(state->name, CPUIDLE_NAME_LEN, "C3");
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- strncpy(state->desc, "A3SM PLL ON", CPUIDLE_DESC_LEN);
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- state->exit_latency = 20;
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- state->target_residency = 30 + 20;
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- state->flags = CPUIDLE_FLAG_TIME_VALID;
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- shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_a3sm_pll_on;
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- drv->state_count++;
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-
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- state = &drv->states[drv->state_count];
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- snprintf(state->name, CPUIDLE_NAME_LEN, "C4");
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- strncpy(state->desc, "A3SM PLL OFF", CPUIDLE_DESC_LEN);
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- state->exit_latency = 120;
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- state->target_residency = 30 + 120;
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- state->flags = CPUIDLE_FLAG_TIME_VALID;
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- shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_a3sm_pll_off;
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- drv->state_count++;
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+ unsigned long msk, msk2;
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+
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+ if (!sh7372_sysc_valid(&msk, &msk2))
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+ return sh7372_enter_a3sm_pll_off(dev, drv, index);
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+
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+ sh7372_setup_sysc(msk, msk2);
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+ sh7372_enter_a4s_common(0);
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+ return 4;
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}
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+static struct cpuidle_driver sh7372_cpuidle_driver = {
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+ .name = "sh7372_cpuidle",
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+ .owner = THIS_MODULE,
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+ .en_core_tk_irqen = 1,
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+ .state_count = 5,
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+ .safe_state_index = 0, /* C1 */
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+ .states[0] = ARM_CPUIDLE_WFI_STATE,
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+ .states[0].enter = shmobile_enter_wfi,
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+ .states[1] = {
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+ .name = "C2",
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+ .desc = "Core Standby Mode",
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+ .exit_latency = 10,
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+ .target_residency = 20 + 10,
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+ .flags = CPUIDLE_FLAG_TIME_VALID,
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+ .enter = sh7372_enter_core_standby,
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+ },
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+ .states[2] = {
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+ .name = "C3",
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+ .desc = "A3SM PLL ON",
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+ .exit_latency = 20,
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+ .target_residency = 30 + 20,
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+ .flags = CPUIDLE_FLAG_TIME_VALID,
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+ .enter = sh7372_enter_a3sm_pll_on,
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+ },
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+ .states[3] = {
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+ .name = "C4",
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+ .desc = "A3SM PLL OFF",
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+ .exit_latency = 120,
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+ .target_residency = 30 + 120,
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+ .flags = CPUIDLE_FLAG_TIME_VALID,
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+ .enter = sh7372_enter_a3sm_pll_off,
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+ },
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+ .states[4] = {
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+ .name = "C5",
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+ .desc = "A4S PLL OFF",
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+ .exit_latency = 240,
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+ .target_residency = 30 + 240,
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+ .flags = CPUIDLE_FLAG_TIME_VALID,
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+ .enter = sh7372_enter_a4s,
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+ .disabled = true,
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+ },
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+};
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+
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static void sh7372_cpuidle_init(void)
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{
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- shmobile_cpuidle_setup = sh7372_cpuidle_setup;
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+ shmobile_cpuidle_set_driver(&sh7372_cpuidle_driver);
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}
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#else
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static void sh7372_cpuidle_init(void) {}
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#endif
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#ifdef CONFIG_SUSPEND
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-static void sh7372_enter_a4s_common(int pllc0_on)
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-{
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- sh7372_intca_suspend();
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- memcpy((void *)SMFRAM, sh7372_resume_core_standby_sysc, 0x100);
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- sh7372_set_reset_vector(SMFRAM);
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- sh7372_enter_sysc(pllc0_on, 1 << 10);
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- sh7372_intca_resume();
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-}
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-
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static int sh7372_enter_suspend(suspend_state_t suspend_state)
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{
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unsigned long msk, msk2;
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/* check active clocks to determine potential wakeup sources */
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- if (sh7372_sysc_valid(&msk, &msk2)) {
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- if (!console_suspend_enabled &&
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- sh7372_pd_a4s.genpd.status == GPD_STATE_POWER_OFF) {
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- /* convert INTC mask/sense to SYSC mask/sense */
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- sh7372_setup_sysc(msk, msk2);
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-
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- /* enter A4S sleep with PLLC0 off */
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- pr_debug("entering A4S\n");
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- sh7372_enter_a4s_common(0);
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- return 0;
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- }
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+ if (sh7372_sysc_valid(&msk, &msk2) && a4s_suspend_ready) {
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+ /* convert INTC mask/sense to SYSC mask/sense */
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+ sh7372_setup_sysc(msk, msk2);
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+
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+ /* enter A4S sleep with PLLC0 off */
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+ pr_debug("entering A4S\n");
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+ sh7372_enter_a4s_common(0);
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+ return 0;
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}
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/* default to enter A3SM sleep with PLLC0 off */
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@@ -425,7 +496,7 @@ static int sh7372_pm_notifier_fn(struct notifier_block *notifier,
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* executed during system suspend and resume, respectively, so
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* that those functions don't crash while accessing the INTCS.
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*/
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- pm_genpd_poweron(&sh7372_pd_a4r.genpd);
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+ pm_genpd_name_poweron("A4R");
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break;
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case PM_POST_SUSPEND:
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pm_genpd_poweroff_unused();
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@@ -454,6 +525,14 @@ void __init sh7372_pm_init(void)
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/* do not convert A3SM, A3SP, A3SG, A4R power down into A4S */
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__raw_writel(0, PDNSEL);
|
|
|
|
|
|
+ sh7372_pm_setup_smfram();
|
|
|
+
|
|
|
sh7372_suspend_init();
|
|
|
sh7372_cpuidle_init();
|
|
|
}
|
|
|
+
|
|
|
+void __init sh7372_pm_init_late(void)
|
|
|
+{
|
|
|
+ shmobile_init_late();
|
|
|
+ pm_genpd_name_attach_cpuidle("A4S", 4);
|
|
|
+}
|