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@@ -177,6 +177,21 @@ static inline void dmar_writeq(void __iomem *addr, u64 val)
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#define dma_frcd_source_id(c) (c & 0xffff)
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#define dma_frcd_page_addr(d) (d & (((u64)-1) << 12)) /* low 64 bit */
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+#define DMAR_OPERATION_TIMEOUT ((cycles_t) tsc_khz*10*1000) /* 10sec */
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+
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+#define IOMMU_WAIT_OP(iommu, offset, op, cond, sts) \
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+{\
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+ cycles_t start_time = get_cycles();\
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+ while (1) {\
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+ sts = op (iommu->reg + offset);\
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+ if (cond)\
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+ break;\
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+ if (DMAR_OPERATION_TIMEOUT < (get_cycles() - start_time))\
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+ panic("DMAR hardware is malfunctioning\n");\
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+ cpu_relax();\
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+ }\
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+}
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+
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struct intel_iommu {
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void __iomem *reg; /* Pointer to hardware regs, virtual addr */
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u64 cap;
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