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@@ -14,6 +14,7 @@
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#include <linux/platform_data/clk-u300.h>
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#include <linux/platform_data/pinctrl-coh901.h>
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#include <linux/irqchip.h>
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+#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/clocksource.h>
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#include <linux/clk.h>
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@@ -48,6 +49,8 @@
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#define U300_SYSCON_BCR_EXTRA_BOOT_OPTION_MASK (0x01FC)
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#define U300_SYSCON_BCR_APP_BOOT_SERV_MASK (0x0003)
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+static void __iomem *syscon_base;
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+
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/*
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* Static I/O mappings that are needed for booting the U300 platforms. The
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* only things we need are the areas where we find the timer, syscon and
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@@ -171,7 +174,7 @@ static void __init u300_init_check_chip(void)
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const char unknown[] = "UNKNOWN";
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/* Read out and print chip ID */
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- val = readw(U300_SYSCON_VBASE + U300_SYSCON_CIDR);
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+ val = readw(syscon_base + U300_SYSCON_CIDR);
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/* This is in funky bigendian order... */
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val = (val & 0xFFU) << 8 | (val >> 8);
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chip = db_chips;
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@@ -244,10 +247,21 @@ static struct of_dev_auxdata u300_auxdata_lookup[] __initdata = {
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static void __init u300_init_irq_dt(void)
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{
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+ struct device_node *syscon;
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struct clk *clk;
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+ syscon = of_find_node_by_path("/syscon@c0011000");
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+ if (!syscon) {
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+ pr_crit("could not find syscon node\n");
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+ return;
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+ }
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+ syscon_base = of_iomap(syscon, 0);
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+ if (!syscon_base) {
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+ pr_crit("could not remap syscon\n");
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+ return;
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+ }
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/* initialize clocking early, we want to clock the INTCON */
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- u300_clk_init(U300_SYSCON_VBASE);
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+ u300_clk_init(syscon_base);
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/* Bootstrap EMIF and SEMI clocks */
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clk = clk_get_sys("pl172", NULL);
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@@ -280,9 +294,9 @@ static void __init u300_init_machine_dt(void)
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u300_auxdata_lookup, NULL);
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/* Enable SEMI self refresh */
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- val = readw(U300_SYSCON_VBASE + U300_SYSCON_SMCR) |
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+ val = readw(syscon_base + U300_SYSCON_SMCR) |
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U300_SYSCON_SMCR_SEMI_SREFREQ_ENABLE;
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- writew(val, U300_SYSCON_VBASE + U300_SYSCON_SMCR);
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+ writew(val, syscon_base + U300_SYSCON_SMCR);
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}
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static const char * u300_board_compat[] = {
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