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@@ -516,10 +516,10 @@ bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q)
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REG_WRITE(ah, AR_Q_DESC_CRCCHK, AR_Q_DESC_CRCCHK_EN);
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ath9k_hw_clear_queue_interrupts(ah, q);
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- if (qi->tqi_qflags & TXQ_FLAG_TXOKINT_ENABLE)
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+ if (qi->tqi_qflags & TXQ_FLAG_TXINT_ENABLE) {
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ah->txok_interrupt_mask |= 1 << q;
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- if (qi->tqi_qflags & TXQ_FLAG_TXERRINT_ENABLE)
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ah->txerr_interrupt_mask |= 1 << q;
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+ }
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if (qi->tqi_qflags & TXQ_FLAG_TXDESCINT_ENABLE)
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ah->txdesc_interrupt_mask |= 1 << q;
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if (qi->tqi_qflags & TXQ_FLAG_TXEOLINT_ENABLE)
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@@ -743,8 +743,7 @@ int ath9k_hw_beaconq_setup(struct ath_hw *ah)
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qi.tqi_cwmax = 0;
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if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
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- qi.tqi_qflags = TXQ_FLAG_TXOKINT_ENABLE |
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- TXQ_FLAG_TXERRINT_ENABLE;
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+ qi.tqi_qflags = TXQ_FLAG_TXINT_ENABLE;
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return ath9k_hw_setuptxqueue(ah, ATH9K_TX_QUEUE_BEACON, &qi);
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}
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