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@@ -44,6 +44,9 @@
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#define MXC_CSPIINT 0x0c
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#define MXC_RESET 0x1c
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+#define MX3_CSPISTAT 0x14
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+#define MX3_CSPISTAT_RR (1 << 3)
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+
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/* generic defines to abstract from the different register layouts */
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#define MXC_INT_RR (1 << 0) /* Receive data ready interrupt */
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#define MXC_INT_TE (1 << 1) /* Transmit FIFO empty interrupt */
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@@ -593,6 +596,11 @@ static int __init spi_imx_probe(struct platform_device *pdev)
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if (!cpu_is_mx31() || !cpu_is_mx35())
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writel(1, spi_imx->base + MXC_RESET);
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+ /* drain receive buffer */
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+ if (cpu_is_mx31() || cpu_is_mx35())
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+ while (readl(spi_imx->base + MX3_CSPISTAT) & MX3_CSPISTAT_RR)
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+ readl(spi_imx->base + MXC_CSPIRXDATA);
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+
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spi_imx->intctrl(spi_imx, 0);
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ret = spi_bitbang_start(&spi_imx->bitbang);
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