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@@ -5887,7 +5887,12 @@ static int __devinit ipr_probe_ioa_part2(struct ipr_ioa_cfg *ioa_cfg)
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ENTER;
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spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
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dev_dbg(&ioa_cfg->pdev->dev, "ioa_cfg adx: 0x%p\n", ioa_cfg);
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- _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_enable_ioa, IPR_SHUTDOWN_NONE);
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+ if (ioa_cfg->needs_hard_reset) {
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+ ioa_cfg->needs_hard_reset = 0;
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+ ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
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+ } else
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+ _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_enable_ioa,
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+ IPR_SHUTDOWN_NONE);
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spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
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wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
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@@ -6264,6 +6269,7 @@ static int __devinit ipr_probe_ioa(struct pci_dev *pdev,
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unsigned long ipr_regs_pci;
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void __iomem *ipr_regs;
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u32 rc = PCIBIOS_SUCCESSFUL;
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+ volatile u32 mask, uproc;
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ENTER;
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@@ -6356,6 +6362,15 @@ static int __devinit ipr_probe_ioa(struct pci_dev *pdev,
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goto cleanup_nomem;
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}
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+ /*
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+ * If HRRQ updated interrupt is not masked, or reset alert is set,
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+ * the card is in an unknown state and needs a hard reset
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+ */
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+ mask = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
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+ uproc = readl(ioa_cfg->regs.sense_uproc_interrupt_reg);
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+ if ((mask & IPR_PCII_HRRQ_UPDATED) == 0 || (uproc & IPR_UPROCI_RESET_ALERT))
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+ ioa_cfg->needs_hard_reset = 1;
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+
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ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
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rc = request_irq(pdev->irq, ipr_isr, SA_SHIRQ, IPR_NAME, ioa_cfg);
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