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@@ -386,7 +386,7 @@ gdt:
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ENTRY(cpu_gdt_table)
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.quad 0x0000000000000000 /* NULL descriptor */
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- .quad 0x008f9a000000ffff /* __KERNEL_COMPAT32_CS */
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+ .quad 0x0 /* unused */
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.quad 0x00af9a000000ffff /* __KERNEL_CS */
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.quad 0x00cf92000000ffff /* __KERNEL_DS */
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.quad 0x00cffa000000ffff /* __USER32_CS */
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@@ -396,8 +396,7 @@ ENTRY(cpu_gdt_table)
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.quad 0,0 /* TSS */
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.quad 0,0 /* LDT */
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.quad 0,0,0 /* three TLS descriptors */
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- .quad 0x00009a000000ffff /* __KERNEL16_CS - 16bit PM for S3 wakeup. */
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- /* base must be patched for real base address. */
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+ .quad 0 /* unused */
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gdt_end:
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/* asm/segment.h:GDT_ENTRIES must match this */
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/* This should be a multiple of the cache line size */
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