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@@ -54,7 +54,7 @@
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#define SR_SRWD 0x80 /* SR write protect */
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#define SR_SRWD 0x80 /* SR write protect */
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/* Define max times to check status register before we give up. */
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/* Define max times to check status register before we give up. */
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-#define MAX_READY_WAIT_COUNT 1000000
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+#define MAX_READY_WAIT_JIFFIES (10 * HZ) /* eg. M25P128 specs 6s max sector erase */
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#define CMD_SIZE 4
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#define CMD_SIZE 4
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#ifdef CONFIG_M25PXX_USE_FAST_READ
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#ifdef CONFIG_M25PXX_USE_FAST_READ
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@@ -139,20 +139,20 @@ static inline int write_enable(struct m25p *flash)
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*/
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*/
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static int wait_till_ready(struct m25p *flash)
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static int wait_till_ready(struct m25p *flash)
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{
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{
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- int count;
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+ unsigned long deadline;
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int sr;
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int sr;
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- /* one chip guarantees max 5 msec wait here after page writes,
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- * but potentially three seconds (!) after page erase.
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- */
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- for (count = 0; count < MAX_READY_WAIT_COUNT; count++) {
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+ deadline = jiffies + MAX_READY_WAIT_JIFFIES;
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+
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+ do {
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if ((sr = read_sr(flash)) < 0)
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if ((sr = read_sr(flash)) < 0)
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break;
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break;
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else if (!(sr & SR_WIP))
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else if (!(sr & SR_WIP))
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return 0;
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return 0;
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- /* REVISIT sometimes sleeping would be best */
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- }
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+ cond_resched();
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+
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+ } while (!time_after_eq(jiffies, deadline));
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return 1;
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return 1;
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}
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}
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