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@@ -156,26 +156,28 @@ EXPORT_SYMBOL(blk_queue_make_request);
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/**
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* blk_queue_bounce_limit - set bounce buffer limit for queue
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- * @q: the request queue for the device
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- * @dma_addr: bus address limit
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+ * @q: the request queue for the device
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+ * @dma_mask: the maximum address the device can handle
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*
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* Description:
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* Different hardware can have different requirements as to what pages
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* it can do I/O directly to. A low level driver can call
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* blk_queue_bounce_limit to have lower memory pages allocated as bounce
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- * buffers for doing I/O to pages residing above @dma_addr.
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+ * buffers for doing I/O to pages residing above @dma_mask.
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**/
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-void blk_queue_bounce_limit(struct request_queue *q, u64 dma_addr)
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+void blk_queue_bounce_limit(struct request_queue *q, u64 dma_mask)
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{
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- unsigned long b_pfn = dma_addr >> PAGE_SHIFT;
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+ unsigned long b_pfn = dma_mask >> PAGE_SHIFT;
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int dma = 0;
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q->bounce_gfp = GFP_NOIO;
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#if BITS_PER_LONG == 64
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- /* Assume anything <= 4GB can be handled by IOMMU.
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- Actually some IOMMUs can handle everything, but I don't
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- know of a way to test this here. */
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- if (b_pfn < (min_t(u64, 0x100000000UL, BLK_BOUNCE_HIGH) >> PAGE_SHIFT))
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+ /*
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+ * Assume anything <= 4GB can be handled by IOMMU. Actually
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+ * some IOMMUs can handle everything, but I don't know of a
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+ * way to test this here.
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+ */
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+ if (b_pfn < (min_t(u64, 0xffffffffUL, BLK_BOUNCE_HIGH) >> PAGE_SHIFT))
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dma = 1;
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q->bounce_pfn = max_low_pfn;
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#else
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