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@@ -15,10 +15,9 @@ module_param(ecc_enable_override, int, 0644);
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static struct msr __percpu *msrs;
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-/* Lookup table for all possible MC control instances */
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-struct amd64_pvt;
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-static struct mem_ctl_info *mci_lookup[EDAC_MAX_NUMNODES];
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-static struct amd64_pvt *pvt_lookup[EDAC_MAX_NUMNODES];
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+/* Per-node driver instances */
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+static struct mem_ctl_info **mcis;
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+static struct amd64_pvt **pvts;
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/*
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* Address to DRAM bank mapping: see F2x80 for K8 and F2x[1,0]80 for Fam10 and
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@@ -1446,7 +1445,7 @@ static int f10_lookup_addr_in_dct(u32 in_addr, u32 nid, u32 cs)
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int cs_found = -EINVAL;
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int csrow;
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- mci = mci_lookup[nid];
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+ mci = mcis[nid];
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if (!mci)
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return cs_found;
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@@ -1995,7 +1994,7 @@ static inline void __amd64_decode_bus_error(struct mem_ctl_info *mci,
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void amd64_decode_bus_error(int node_id, struct mce *m, u32 nbcfg)
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{
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- struct mem_ctl_info *mci = mci_lookup[node_id];
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+ struct mem_ctl_info *mci = mcis[node_id];
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struct err_regs regs;
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regs.nbsl = (u32) m->status;
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@@ -2615,7 +2614,7 @@ static int amd64_probe_one_instance(struct pci_dev *F2)
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* Save the pointer to the private data for use in 2nd initialization
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* stage
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*/
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- pvt_lookup[pvt->mc_node_id] = pvt;
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+ pvts[pvt->mc_node_id] = pvt;
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return 0;
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@@ -2672,8 +2671,8 @@ static int amd64_init_2nd_stage(struct amd64_pvt *pvt)
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goto err_add_mc;
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}
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- mci_lookup[node_id] = mci;
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- pvt_lookup[node_id] = NULL;
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+ mcis[node_id] = mci;
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+ pvts[node_id] = NULL;
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/* register stuff with EDAC MCE */
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if (report_gart_errors)
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@@ -2696,8 +2695,8 @@ err_exit:
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amd64_free_mc_sibling_devices(pvt);
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- kfree(pvt_lookup[pvt->mc_node_id]);
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- pvt_lookup[node_id] = NULL;
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+ kfree(pvts[pvt->mc_node_id]);
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+ pvts[node_id] = NULL;
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return ret;
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}
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@@ -2746,7 +2745,7 @@ static void __devexit amd64_remove_one_instance(struct pci_dev *pdev)
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/* Free the EDAC CORE resources */
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mci->pvt_info = NULL;
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- mci_lookup[pvt->mc_node_id] = NULL;
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+ mcis[pvt->mc_node_id] = NULL;
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kfree(pvt);
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edac_mc_free(mci);
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@@ -2793,7 +2792,7 @@ static void amd64_setup_pci_device(void)
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if (amd64_ctl_pci)
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return;
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- mci = mci_lookup[0];
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+ mci = mcis[0];
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if (mci) {
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pvt = mci->pvt_info;
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@@ -2822,6 +2821,12 @@ static int __init amd64_edac_init(void)
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if (amd_cache_northbridges() < 0)
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goto err_ret;
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+ err = -ENOMEM;
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+ pvts = kzalloc(amd_nb_num() * sizeof(pvts[0]), GFP_KERNEL);
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+ mcis = kzalloc(amd_nb_num() * sizeof(mcis[0]), GFP_KERNEL);
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+ if (!(pvts && mcis))
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+ goto err_ret;
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+
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msrs = msrs_alloc();
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if (!msrs)
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goto err_ret;
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@@ -2831,16 +2836,16 @@ static int __init amd64_edac_init(void)
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goto err_pci;
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/*
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- * At this point, the array 'pvt_lookup[]' contains pointers to alloc'd
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+ * At this point, the array 'pvts[]' contains pointers to alloc'd
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* amd64_pvt structs. These will be used in the 2nd stage init function
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* to finish initialization of the MC instances.
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*/
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err = -ENODEV;
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for (nb = 0; nb < amd_nb_num(); nb++) {
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- if (!pvt_lookup[nb])
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+ if (!pvts[nb])
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continue;
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- err = amd64_init_2nd_stage(pvt_lookup[nb]);
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+ err = amd64_init_2nd_stage(pvts[nb]);
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if (err)
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goto err_2nd_stage;
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@@ -2854,9 +2859,11 @@ static int __init amd64_edac_init(void)
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err_2nd_stage:
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pci_unregister_driver(&amd64_pci_driver);
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+
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err_pci:
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msrs_free(msrs);
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msrs = NULL;
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+
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err_ret:
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return err;
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}
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@@ -2868,6 +2875,12 @@ static void __exit amd64_edac_exit(void)
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pci_unregister_driver(&amd64_pci_driver);
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+ kfree(mcis);
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+ mcis = NULL;
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+
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+ kfree(pvts);
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+ pvts = NULL;
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+
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msrs_free(msrs);
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msrs = NULL;
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}
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